G06F 12/0853
Cache with multiport tag or data arrays
G06F12/0853 (Cache with multiport tag or data arrays) appears on 196 US grants and 184 published applications in this corpus.
Search patents in G06F- Granted patents
- 196
- Published applications
- 184
- Assignees
- 66
- Inventors
- 307
- Latest grant
- 16 Jun 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1988 | 1 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 3 | 0 |
| 1992 | 0 | 0 |
| 1993 | 3 | 0 |
| 1994 | 2 | 0 |
| 1995 | 2 | 0 |
| 1996 | 7 | 0 |
| 1997 | 4 | 0 |
| 1998 | 5 | 0 |
| 1999 | 4 | 0 |
| 2000 | 1 | 0 |
| 2001 | 1 | 1 |
| 2002 | 1 | 2 |
| 2003 | 1 | 0 |
| 2004 | 1 | 3 |
| 2005 | 1 | 1 |
| 2006 | 2 | 1 |
| 2007 | 0 | 1 |
| 2008 | 1 | 2 |
| 2009 | 1 | 5 |
| 2010 | 2 | 5 |
| 2011 | 0 | 3 |
| 2012 | 3 | 2 |
| 2013 | 2 | 1 |
| 2014 | 4 | 14 |
| 2015 | 10 | 5 |
| 2016 | 10 | 2 |
| 2017 | 7 | 7 |
| 2018 | 10 | 6 |
| 2019 | 3 | 10 |
| 2020 | 8 | 28 |
| 2021 | 11 | 11 |
| 2022 | 20 | 14 |
| 2023 | 21 | 18 |
| 2024 | 20 | 17 |
| 2025 | 19 | 21 |
| 2026 | 5 | 4 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Methods and apparatus for eviction in dual datapath victim cache system16 Jun 2026US 12,657,134 B2Texas Instruments Incorporated
- Methods and apparatus for inflight data forwarding and invalidation of pending writes in store queue16 Jun 2026US 12,657,135 B2Texas Instruments Incorporated
- Methods and apparatus to facilitate read-modify-write support in a victim cache12 May 2026US 12,625,822 B2Texas Instruments Incorporated
- Sparsity compression for increased cache capacity10 Mar 2026US 12,572,474 B2Advanced Micro Devices, Inc.
- Methods and apparatus to reduce read-modify-write cycles for non-aligned writes3 Feb 2026US 12,541,468 B2Texas Instruments Incorporated
- Methods and apparatus for eviction in dual datapath victim cache system1 Oct 2026US 2026/0300187 A1
- Methods and apparatus to facilitate read-modify-write support in a victim cache17 Sep 2026US 2026/0277825 A1
- Systems and methods for high fidelity region from probe filter entry26 Mar 2026US 2026/0086941 A1Advanced Micro Devices, Inc.
- Victim cache that supports draining write-miss entries5 Feb 2026US 2026/0037451 A1
- Write merging on stores with different tags25 Dec 2025US 2025/0390441 A1Texas Instruments Incorporated
Most cited
By later US patents
- Migrating data in a storage array that includes a plurality of storage devices and a plurality of write buffer devices503US 9,507,532 B1Pure Storage, Inc. · 2016
- Fault tolerant data storage subsystem employing hierarchically arranged controllers220US 5,504,882 AInternational Business Machines Corporation · 1996
- Triple port cache memory143US 5,442,770 ANEC Electronics Corporation · 1995
- Method of and apparatus for validating data read out of a multi port internally cached dynamic random access memory (AMPIC DRAM)74US 6,085,290 ANexabit Networks, Inc. · 2000
- Methods and apparatuses for servicing load instructions63US 5,745,729 ASun Microsystems, Inc. · 1998