Soitec
Soitec is named on 0 US grants and 4 published applications in this corpus. Its most frequent classification is H10P (Generic processes or apparatus for the manufacture or treatment of devices covered).
- Granted patents
- 0
- Published applications
- 4
- Inventors
- 17
- Granted in 2026 so far
- 0
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 2004 | 0 | 1 |
| 2005 | 0 | 1 |
| 2006 | 0 | 0 |
| 2007 | 0 | 0 |
| 2008 | 0 | 0 |
| 2009 | 0 | 0 |
| 2010 | 0 | 0 |
| 2011 | 0 | 0 |
| 2012 | 0 | 0 |
| 2013 | 0 | 0 |
| 2014 | 0 | 0 |
| 2015 | 0 | 1 |
| 2016 | 0 | 0 |
| 2017 | 0 | 0 |
| 2018 | 0 | 0 |
| 2019 | 0 | 0 |
| 2020 | 0 | 1 |
By publication year.
Technology areas
Share of 4 documents
- H10PGeneric processes or apparatus for the manufacture or treatment of devices covered3
- H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by2
- A61BMedical diagnosis and surgery1
- H03HImpedance networks1
- H10HInorganic light-emitting semiconductor devices having potential barriers1
- H10NElectric solid-state devices not otherwise provided for1
- Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests1
Recent patents
No granted patents yet.
- Substrate for a temperature-compensated surface acoustic wave device or volume acoustic wave device16 Jul 2020US 2020/0228088 A1
- Methods for fabrication of semiconductor structures using laser lift-off process, and related semiconductor structures25 Jun 2015US 2015/0179520 A1
- Surface treatment for multi-layer wafers formed from layers of materials chosen from among semiconducting materials16 Jun 2005US 2005/0130429 A1
- Method of detaching a thin film at moderate temperature after co-implantation2 Sep 2004US 2004/0171232 A1
Most cited
By later US patents
None of its patents has been cited by a later US patent yet.