H04J 3/073
Bit stuffing
Official title: {Bit stuffing, e.g. PDH}
H04J3/073 (Bit stuffing) appears on 87 US grants and 15 published applications in this corpus.
Search patents in H04J- Granted patents
- 87
- Published applications
- 15
- Assignees
- 54
- Inventors
- 146
- Latest grant
- 25 Jul 2023
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 5 | 0 |
| 1977 | 3 | 0 |
| 1978 | 1 | 0 |
| 1979 | 3 | 0 |
| 1980 | 1 | 0 |
| 1981 | 1 | 0 |
| 1982 | 3 | 0 |
| 1983 | 5 | 0 |
| 1984 | 2 | 0 |
| 1985 | 2 | 0 |
| 1986 | 1 | 0 |
| 1987 | 6 | 0 |
| 1988 | 3 | 0 |
| 1989 | 7 | 0 |
| 1990 | 4 | 0 |
| 1991 | 1 | 0 |
| 1992 | 2 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 1 | 0 |
| 1996 | 4 | 0 |
| 1997 | 5 | 0 |
| 1998 | 4 | 0 |
| 1999 | 1 | 0 |
| 2000 | 2 | 0 |
| 2001 | 1 | 1 |
| 2002 | 3 | 0 |
| 2003 | 3 | 1 |
| 2004 | 1 | 2 |
| 2005 | 0 | 1 |
| 2006 | 0 | 1 |
| 2007 | 1 | 1 |
| 2008 | 1 | 1 |
| 2009 | 0 | 0 |
| 2010 | 3 | 1 |
| 2011 | 0 | 0 |
| 2012 | 0 | 0 |
| 2013 | 1 | 2 |
| 2014 | 1 | 0 |
| 2015 | 1 | 1 |
| 2016 | 1 | 0 |
| 2017 | 0 | 0 |
| 2018 | 0 | 0 |
| 2019 | 0 | 2 |
| 2020 | 0 | 0 |
| 2021 | 1 | 1 |
| 2022 | 1 | 0 |
| 2023 | 1 | 0 |
By publication year. Applications have been published since 2001.
Recent patents
- High accuracy time stamping for multi-lane ports25 Jul 2023US 11,711,159 B2Intel Corporation
- High accuracy time stamping for multi-lane ports1 Mar 2022US 11,265,096 B2Intel Corporation
- Method for processing data in ethernet, device, and system23 Feb 2021US 10,931,578 B2Huawei Technologies Co., Ltd.
- Communication reception with compensation for relative variation between transmit bit interval and receiver sampling interval14 Jun 2016US 9,369,267 B2Texas Instruments Incorporated
- Deskew apparatus and method for peripheral component interconnect express16 Jun 2015US 9,058,266 B2Electronics and Telecommunications Research Institute
- High accuracy time stamping for multi-lane ports20 May 2021US 2021/0152271 A1Intel Corporation
- High accuracy time stamping for multi-lane ports5 Sep 2019US 2019/0273571 A1Intel Corporation
- Method for processing data in ethernet, device, and system14 Feb 2019US 2019/0052562 A1Huawei Technologies Co., Ltd.
- Communication reception with compensation for relative variation between transmit bit interval and receiver sampling interval12 Nov 2015US 2015/0326386 A1Texas Instruments Incorporated
- System and Method for Multiplexing PDH and Packet Data21 Nov 2013US 2013/0308659 A1Harris Stratex Networks, Inc.
Most cited
By later US patents
- Method of and apparatus for multiplexing and demultiplexing digital signal streams82US 6,157,659 ANortel Networks Limited · 2000
- Asynchronous data clock generator69US 4,596,026 ARaytheon Company · 1986
- Network multiplex structure62US 4,667,324 ANorthern Telecom Limited · 1987
- Inter-base synchronization technique for a TDMA communication system46US 5,666,366 ANational Semiconductor Corporation · 1997
- Asynchronous multiplexer and demultiplexer combination44US 3,982,077 AInternational Telephone and Telegraph Corporation · 1976