Asynchronous data clock generator

An asynchronous data transferring circuit for generating a substantially smooth clock having a long term rate substantially equal to the rate of incoming asynchronous serial digital data, comprising:

• a serial to parallel converter for converting said serial data to data words;
• a first-in first-out elastic store connected to the output of said converter for storing a plurality of said data words;
• means for clocking said data words into said elastic store;
• means for clocking said data words out of said elastic store;
• a parallel to serial converter connected to the output of said elastic store for receiving said data words clocked out of said elastic store;
• means for measuring the time interval between one of said data words being clocked into said elastic store and said one being clocked out of said elastic store;
• means responsive to said measuring means for providing an analog signal corresponding to the occupancy of said elastic store;
• means responsive to said analog signal for generating said substantially smooth clock having a long term rate substantially equal to the rate of said incoming asynchronous serial digital data, said substantially smooth clock being used to clock said digital data words out of said parallel to serial converter;
• and
• said elastic store clocking out means comprising a divider for dividing said substantially smooth clock.

A circuit for generating a smooth clock for clocking asynchronous data comprising:

• a serial to parallel converter for converting said digital asynchronous serial data to data words;
• a first-in first-out memory having its input word terminal except for at least one bit connected to the output of said serial to parallel converter for receiving said data words;
• means for providing a predetermined digital voltage to said at least one bit of said first-in first-out memory input word terminal;
• means initiated simultaneous to inputting said voltage to said first-in first-out memory for generating a continuous count;
• means comprising a voltage controlled oscillator for reading words out of said first-in first-out memory;
• means responsive to said voltage being read out of said first-in first-out memory for storing the output of said generating means wherein said stored count corresponds to the number of digital words stored in said first-in first-out memory;
• a digital to analog converter coupled to the output of said storing means for providing an analog signal derived from said count, the output of said digital to analog converter being coupled to said voltage controlled oscillator as a control signal for increasing or decreasing the rate of said reading out of said first-in first-out memory as a function of the occupancy level of said first-in first-out memory.

The method of providing a substantially smooth clock for clocking asynchronous digital data words out of a first-in first-out memory comprising the steps of:

• writing a predetermined logical voltage into a designated bit of an input word clocked into said first-in first-out memory;
• resetting a counter simultaneous to said writing step;
• storing the count of said coutner in response to said voltage being read out of said first-in first-out memory;
• converting said count to an analog signal;
• and
• generating a substantially smooth clock in response to said analog signal.