H03M 13/2942
Wherein a block of parity bits is computed only from combined information
Official title: {wherein a block of parity bits is computed only from combined information bits or only from parity bits, e.g. a second block of parity bits is computed from a first block of parity bits obtained by systematic encoding of a block of information bits, or a block of parity bits is obtained by an XOR combination of sub-blocks of information bits}
H03M13/2942 (Wherein a block of parity bits is computed only from combined information) appears on 136 US grants and 132 published applications in this corpus.
Search patents in H03M- Granted patents
- 136
- Published applications
- 132
- Assignees
- 72
- Inventors
- 263
- Latest grant
- 7 Apr 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1998 | 1 | 0 |
| 1999 | 0 | 0 |
| 2000 | 0 | 0 |
| 2001 | 1 | 0 |
| 2002 | 0 | 0 |
| 2003 | 1 | 0 |
| 2004 | 0 | 0 |
| 2005 | 0 | 3 |
| 2006 | 0 | 1 |
| 2007 | 2 | 2 |
| 2008 | 1 | 1 |
| 2009 | 2 | 3 |
| 2010 | 0 | 2 |
| 2011 | 2 | 2 |
| 2012 | 3 | 3 |
| 2013 | 6 | 6 |
| 2014 | 9 | 8 |
| 2015 | 12 | 11 |
| 2016 | 5 | 8 |
| 2017 | 7 | 9 |
| 2018 | 4 | 11 |
| 2019 | 18 | 11 |
| 2020 | 11 | 9 |
| 2021 | 19 | 17 |
| 2022 | 13 | 5 |
| 2023 | 6 | 5 |
| 2024 | 5 | 5 |
| 2025 | 6 | 5 |
| 2026 | 2 | 5 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Data validation and correction using hybrid parity and error correcting codes7 Apr 2026US 12,597,948 B2Frontgrade Gaisler AB
- Non-volatile storage device offloading20 Jan 2026US 12,531,130 B2Kioxia Corporation
- Forward error correction with flexible matrix for dynamic input data rate2 Dec 2025US 12,489,559 B2Kratos Integral Holdings, LLC
- Data storage device with joint error correction code engines21 Oct 2025US 12,451,904 B1SanDisk Technologies LLC
- System and method for protecting data5 Aug 2025US 12,379,992 B2Microsoft Technology Licensing, LLC
- Systematic polar encoding operation18 Jun 2026US 2026/0172146 A1QUALCOMM Incorporated
- Non-volatile storage device offloading28 May 2026US 2026/0148794 A1Kioxia Corporation
- Forward error correction with flexible matrix for dynamic input data rate28 May 2026US 2026/0149533 A1Kratos Integral Holdings, LLC
- Method for performing parity bit calculation with aid of circuit complexity reduction for performing error correction, and associated apparatus26 Mar 2026US 2026/0088833 A1Realtek Semiconductor Corp.
- System and Method for Protecting Data19 Feb 2026US 2026/0050513 A1Microsoft Technology Licensing, LLC
Most cited
By later US patents
- Enabling efficient recovery from multiple failures together with one latent error in a storage array205US 9,229,810 B2International Business Machines Corporation · 2016
- Error correction coding in non-volatile memory190US 9,124,300 B2SanDisk Technologies LLC · 2015
- Enabling efficient recovery from multiple failures together with one latent error in a storage array186US 9,417,963 B2International Business Machines Corporation · 2016
- Method and apparatus for transmitting and receiving information packets using multi-layer error detection40US 6,173,431 B2Motorola, Inc. · 2001
- Throughput optimization for redundancy coded data storage systems36US 9,866,242 B1Amazon Technologies, Inc. · 2018