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US 9,124,300 B2Granted
Error correction coding in non-volatile memory
AssigneeSanDisk Technologies LLC
InventorsEran Sharon, Idan Alrod
Life of this patent
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Abstract
A method includes encoding data bits into codewords according to a first error correction encoding scheme. The method includes storing the codewords into a memory and generating a combined codeword by encoding, at the memory, the codewords according to a second error correction encoding scheme to generate parity bits of the combined codeword. The method includes, after storing the codewords into the memory, storing the parity bits of the combined codeword into the memory.
Claims32
A method comprising:
- encoding first data according to a first error correction encoding scheme to form a first codeword;
- encoding second data according to the first error correction encoding scheme to form a second codeword;
- storing the first and second codewords into a memory;
- encoding, at the memory, the first and second codewords according to a second error correction encoding scheme to generate parity bits of a combined codeword including the first and second codewords;
- and
- after storing the first and second codewords into the memory, storing the parity bits of the combined codeword into the memory.
3 more elements
A method comprising:
- encoding data bits into first codewords according to a first error correction encoding scheme;
- storing each of the first codewords into a memory;
- reading the first codewords from the memory;
- and
- in response to a value of an error indicator exceeding a threshold:
- generating rarity bits of a combined codeword according to a second error correction encoding scheme, the combined codeword including multiple codewords of the first codewords;
- and
- storing the parity bits of the combined codeword into the memory.
5 more elements
A data storage device comprising:
- a memory;
- a controller coupled to the memory, wherein the controller is configured to encode data bits into first codewords according to a first error correction encoding scheme and to send the first codewords to be stored in the memory;
- and
- parity generation circuitry configured to generate parity bits of a combined codeword according to a second error correction encoding scheme, the combined codeword including multiple codewords of the first codewords, and
- wherein the memory is configured to store the parity bits of the combined codeword after storing the first codewords into the memory.
2 more elements
A data storage device comprising:
- a memory;
- and
- a controller coupled to the memory, wherein the controller is configured to encode data bits into first codewords according to a first error correction encoding scheme and to send the first codewords to be stored in the memory, wherein the controller is further configured to receive the first codewords from the memory,
- wherein, in response to a value of an error indicator exceeding a threshold, the controller is configured to generate parity bits of a combined codeword according to a second error correction encoding scheme and to send the parity bits of the combined codeword to be stored in the memory, the combined codeword including multiple codewords of the first codewords.
1 more element
Dependencies are inferred from the claim text.