Data storage device with joint error correction code engines
AssigneeSanDisk Technologies LLC
InventorsEran Sharon, Alexander Bazarsky, Ran Zamir
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Abstract
Examples described herein provide a joint LDPC and XOR (JLX) error correction scheme that utilizes parity of the LDPC code to correct errors in XOR stripes of data, allowing improved protection against error. For example, when decoding of a codeword fails, an XOR operation is performed on the other codewords within the same XOR stripe to generate a copy of the failed codeword. The copy of the failed codeword is used as a soft bit input to an LDPC decoder, providing a sense of where errors in the failed codeword may be situated. The LDPC decoder may then recover the failed codeword. The scrambling seed used for encoding pages of data may also be used for recovering from error in a JLX ECC operation.
Claims20
A data storage device comprising:
- a memory for storing a plurality of codewords;
- and
- a data storage device controller coupled to the memory, the controller including a processor and a controller memory storing a set of instructions that, when executed by the processor, instruct the controller to:
- detect, during decoding of the plurality of codewords, at least two failed codewords that failed to be decoded;
- determine scrambling seeds associated with the at least two failed codewords;
- perform a joint low density parity check and exclusive-or (JLX) operation using the scrambling seeds associated with the at least two failed codewords;
- and
- recover at least one of the at least two failed codewords from the JLX operation.
A method comprising:
- detecting, during decoding of a plurality of codewords by a storage controller executing decoding firmware, at least two failed codewords that failed to be decoded;
- determining, with the storage controller, scrambling seeds associated with the at least two failed codewords;
- performing, with the storage controller, a joint low density parity check and exclusive-or (JLX) operation using the scrambling seeds associated with the at least two failed codewords;
- and
- recovering, with the storage controller, at least one of the at least two failed codewords from the JLX operation.
A memory device comprising:
- a memory for storing a plurality of codewords;
- and
- a controller coupled to the memory, wherein the controller is configured to perform a joint low density parity check and exclusive-or (JLX) operation using a scrambling seed derived by the controller based on successfully-corrected codewords and associated with a failed codeword of the plurality of codewords, to recover the failed codeword when at least two codewords of the plurality of codewords fail during decoding.
Dependencies are inferred from the claim text.