G06F 9/30036
Instructions to perform operations on packed data
Official title: {Instructions to perform operations on packed data, e.g. vector, tile or matrix operations}
G06F9/30036 (Instructions to perform operations on packed data) appears on 4,024 US grants and 4,399 published applications in this corpus.
Search patents in G06F- Granted patents
- 4,024
- Published applications
- 4,399
- Assignees
- 570
- Inventors
- 5,051
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1976 | 1 | 0 |
| 1977 | 3 | 0 |
| 1978 | 3 | 0 |
| 1979 | 2 | 0 |
| 1980 | 1 | 0 |
| 1981 | 4 | 0 |
| 1982 | 2 | 0 |
| 1983 | 3 | 0 |
| 1984 | 4 | 0 |
| 1985 | 1 | 0 |
| 1986 | 5 | 0 |
| 1987 | 5 | 0 |
| 1988 | 6 | 0 |
| 1989 | 11 | 0 |
| 1990 | 12 | 0 |
| 1991 | 12 | 0 |
| 1992 | 7 | 0 |
| 1993 | 13 | 0 |
| 1994 | 10 | 0 |
| 1995 | 17 | 0 |
| 1996 | 33 | 0 |
| 1997 | 46 | 0 |
| 1998 | 80 | 0 |
| 1999 | 75 | 0 |
| 2000 | 69 | 0 |
| 2001 | 66 | 15 |
| 2002 | 56 | 61 |
| 2003 | 40 | 58 |
| 2004 | 44 | 117 |
| 2005 | 44 | 91 |
| 2006 | 61 | 61 |
| 2007 | 66 | 59 |
| 2008 | 70 | 114 |
| 2009 | 51 | 97 |
| 2010 | 66 | 72 |
| 2011 | 79 | 66 |
| 2012 | 65 | 83 |
| 2013 | 95 | 184 |
| 2014 | 83 | 219 |
| 2015 | 115 | 162 |
| 2016 | 209 | 221 |
| 2017 | 219 | 239 |
| 2018 | 189 | 265 |
| 2019 | 256 | 350 |
| 2020 | 272 | 284 |
| 2021 | 260 | 297 |
| 2022 | 266 | 301 |
| 2023 | 266 | 258 |
| 2024 | 267 | 309 |
| 2025 | 244 | 231 |
| 2026 | 150 | 185 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
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- Processor embedded streaming buffer29 Sep 2026US 12,748,592 B2Intel Corporation
- Systems, methods, and apparatuses for heterogeneous computing29 Sep 2026US 12,748,618 B2Intel Corporation
- Control method and chip8 Oct 2026US 2026/0310463 A1Smarter Silicon (Shanghai) Technologies Co., Ltd.
- Inserting null vectors into a stream of vectors8 Oct 2026US 2026/0310466 A1Texas Instruments Incorporated
- 8-bit floating point comparison instructions1 Oct 2026US 2026/0299944 A1Intel Products IP LLC
- Quantized flash attention1 Oct 2026US 2026/0299946 A1Tesla, Inc.
- Vector index registers in vector processors that each store multiple addresses for accessing multiple positions in vectors1 Oct 2026US 2026/0299952 A1Micron Technology, Inc.
Most cited
By later US patents
- Packet processing system including a policy engine having a classification unit624US 6,157,955 AIntel Corporation · 2000
- Method and system for efficient matrix multiplication in a SIMD processor architecture531US 7,873,812 B12011
- Running-min and running-max instructions for processing vectors using a base value from a key element of an input vector426US 8,417,921 B2Apple Inc. · 2013
- Maintaining even and odd array pointers to extreme values by searching and comparing multiple elements concurrently where a pointer is adjusted after processing to account for a number of pipeline stages422US 6,948,056 B1Analog Devices, Inc. · 2005
- Vector processor system420US 8,356,144 B22013