G06F 11/1407
Checkpointing the instruction stream
Official title: {Checkpointing the instruction stream}
G06F11/1407 (Checkpointing the instruction stream) appears on 403 US grants and 318 published applications in this corpus.
Search patents in G06F- Granted patents
- 403
- Published applications
- 318
- Assignees
- 117
- Inventors
- 774
- Latest grant
- 29 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1977 | 1 | 0 |
| 1978 | 1 | 0 |
| 1979 | 0 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 1 | 0 |
| 1988 | 1 | 0 |
| 1989 | 1 | 0 |
| 1990 | 1 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 1 | 0 |
| 1994 | 1 | 0 |
| 1995 | 2 | 0 |
| 1996 | 8 | 0 |
| 1997 | 13 | 0 |
| 1998 | 13 | 0 |
| 1999 | 10 | 0 |
| 2000 | 9 | 0 |
| 2001 | 1 | 0 |
| 2002 | 1 | 4 |
| 2003 | 4 | 0 |
| 2004 | 4 | 4 |
| 2005 | 0 | 3 |
| 2006 | 2 | 13 |
| 2007 | 3 | 8 |
| 2008 | 6 | 11 |
| 2009 | 8 | 6 |
| 2010 | 13 | 12 |
| 2011 | 9 | 6 |
| 2012 | 8 | 4 |
| 2013 | 9 | 10 |
| 2014 | 14 | 19 |
| 2015 | 16 | 31 |
| 2016 | 39 | 30 |
| 2017 | 21 | 18 |
| 2018 | 22 | 14 |
| 2019 | 25 | 20 |
| 2020 | 27 | 20 |
| 2021 | 26 | 16 |
| 2022 | 19 | 16 |
| 2023 | 25 | 19 |
| 2024 | 16 | 17 |
| 2025 | 9 | 6 |
| 2026 | 13 | 11 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
- Efficient append-only file system for high-performance key-value stores29 Sep 2026US 12,748,733 B2
- Handling workload interruptions in cloud computing platforms14 Jul 2026US 12,681,754 B1Citibank, N. A.
- Cycle accurate tracing of vector instructions7 Jul 2026US 12,675,367 B2SiFive, Inc.
- Job rescheduling using a dynamic number of processors7 Jul 2026US 12,675,379 B1NVIDIA Corporation
- Systems and methods for secure multi-party computation protocol execution using check points23 Jun 2026US 12,665,743 B2Enveil, Inc.
- Cycle accurate tracing of vector instructions1 Oct 2026US 2026/0300096 A1SiFive, Inc.
- Blockchain-Enabled Digital Transaction Architecture for Incentivizing Trust in Digital Engineering17 Sep 2026US 2026/0280893 A1Istari Digital, Inc.
- Systems and methods for managing and controlling multi-cpu environments without a shared clock source or varying cpu frequencies27 Aug 2026US 2026/0252361 A1Raptor Engineering, LLC
- Log-structured file system for a zoned block memory device2 Jul 2026US 2026/0187034 A1Micron Technology, Inc.
- Multi-core cluster processing for secure save and restore operations during deep sleep power state4 Jun 2026US 2026/0154159 A1QUALCOMM Incorporated
Most cited
By later US patents
- Error correction method with instruction level rollback420US 8,095,825 B2Renesas Electronics Corporation · 2012
- Extent metadata update logging and checkpointing126US 8,880,787 B1NetApp, Inc. · 2014
- Virtual address table look aside buffer miss recovery method and apparatus108US 4,920,477 AMultiflow Computer, Inc. · 1990
- Checkpointing of metadata into user data area of a content addressable storage system105US 10,176,046 B1EMC IP Holding Company LLC · 2019
- Processor structure and method for maintaining and restoring precise state at any instruction boundary103US 5,649,136 AHaL Computer Systems, Inc. · 1997