G06F 8/445
Exploiting fine grain parallelism, i.e. parallelism at instruction level
Official title: {Exploiting fine grain parallelism, i.e. parallelism at instruction level (run-time instruction scheduling G06F9/3836)}
G06F8/445 (Exploiting fine grain parallelism, i.e. parallelism at instruction level) appears on 614 US grants and 522 published applications in this corpus.
Search patents in G06F- Granted patents
- 614
- Published applications
- 522
- Assignees
- 173
- Inventors
- 1,181
- Latest grant
- 16 Jun 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1984 | 1 | 0 |
| 1985 | 0 | 0 |
| 1986 | 0 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 1 | 0 |
| 1990 | 1 | 0 |
| 1991 | 2 | 0 |
| 1992 | 4 | 0 |
| 1993 | 6 | 0 |
| 1994 | 8 | 0 |
| 1995 | 7 | 0 |
| 1996 | 14 | 0 |
| 1997 | 11 | 0 |
| 1998 | 27 | 0 |
| 1999 | 30 | 0 |
| 2000 | 15 | 0 |
| 2001 | 20 | 8 |
| 2002 | 11 | 22 |
| 2003 | 18 | 19 |
| 2004 | 13 | 27 |
| 2005 | 12 | 23 |
| 2006 | 23 | 19 |
| 2007 | 12 | 23 |
| 2008 | 10 | 22 |
| 2009 | 16 | 22 |
| 2010 | 25 | 11 |
| 2011 | 12 | 6 |
| 2012 | 25 | 14 |
| 2013 | 15 | 19 |
| 2014 | 18 | 23 |
| 2015 | 26 | 26 |
| 2016 | 31 | 27 |
| 2017 | 32 | 16 |
| 2018 | 22 | 28 |
| 2019 | 25 | 14 |
| 2020 | 22 | 21 |
| 2021 | 16 | 16 |
| 2022 | 23 | 31 |
| 2023 | 21 | 34 |
| 2024 | 20 | 18 |
| 2025 | 12 | 16 |
| 2026 | 7 | 17 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- AI-based software pipeline transformation16 Jun 2026US 12,657,015 B2Microsoft Technology Licensing, LLC
- Matrix multiplication packing with instruction reordering19 May 2026US 12,632,693 B1Amazon Technologies, Inc.
- Technique for inter-procedural memory address space optimization in GPU computing compiler17 Mar 2026US 12,578,941 B2NVIDIA Corporation
- Parallel processing architecture with distributed register files17 Mar 2026US 12,578,991 B2Ascenium, Inc.
- Collective operation and compute operation pipelining24 Feb 2026US 12,561,120 B1Amazon Technologies, Inc.
- Computer-Implemented Method and System for Generating a Command Pipeline for Controlling a Technical Device10 Sep 2026US 2026/0267625 A1Siemens Aktiengesellschaft
- Optimization device and optimization method13 Aug 2026US 2026/0236242 A1Fujitsu Limited
- Burst Scheduling13 Aug 2026US 2026/0236296 A1
- Control of storage aliasing via automatic application of artificial dependences during program compilation30 Jul 2026US 2026/0219849 A1NVIDIA Corporation
- Compiling sql intrinsics for parallel execution23 Jul 2026US 2026/0211650 A1Microsoft Technology Licensing, LLC
Most cited
By later US patents
- System and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel execution thread scheduling448US 5,179,702 ASupercomputer Systems Limited Partnership · 1993
- Method and apparatus for user side scheduling in a multiprocessor operating system program that implements distributive scheduling of processes323US 6,195,676 B1Silicon Graphics, Inc. · 2001
- Parallel processing method and apparatus for increasing processing throughout by parallel processing low level instructions having natural concurrencies205US 4,847,755 AMCC Development, Ltd. · 1989
- Computer with integrated hierarchical representation (IHR) of program wherein IHR file is available for debugging and optimizing during target execution199US 5,175,856 ASupercomputer Systems Limited Partnership · 1992
- Method for efficient non-virtual main memory management193US 5,159,678 ASupercomputer Systems Limited Partnership · 1992