G06F 8/4442
Reducing the number of cache misses
Official title: {Reducing the number of cache misses; Data prefetching (cache prefetching G06F12/0862)}
G06F8/4442 (Reducing the number of cache misses) appears on 354 US grants and 330 published applications in this corpus.
Search patents in G06F- Granted patents
- 354
- Published applications
- 330
- Assignees
- 104
- Inventors
- 727
- Latest grant
- 18 Aug 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1991 | 1 | 0 |
| 1992 | 0 | 0 |
| 1993 | 1 | 0 |
| 1994 | 2 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 3 | 0 |
| 1998 | 6 | 0 |
| 1999 | 11 | 0 |
| 2000 | 9 | 0 |
| 2001 | 15 | 3 |
| 2002 | 6 | 15 |
| 2003 | 8 | 14 |
| 2004 | 7 | 18 |
| 2005 | 11 | 24 |
| 2006 | 17 | 9 |
| 2007 | 11 | 15 |
| 2008 | 12 | 15 |
| 2009 | 10 | 12 |
| 2010 | 11 | 13 |
| 2011 | 7 | 16 |
| 2012 | 12 | 13 |
| 2013 | 16 | 19 |
| 2014 | 26 | 17 |
| 2015 | 19 | 20 |
| 2016 | 27 | 13 |
| 2017 | 20 | 9 |
| 2018 | 15 | 15 |
| 2019 | 15 | 19 |
| 2020 | 13 | 9 |
| 2021 | 7 | 10 |
| 2022 | 12 | 6 |
| 2023 | 9 | 9 |
| 2024 | 7 | 12 |
| 2025 | 3 | 2 |
| 2026 | 5 | 3 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Recent patents
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- Profile guided memory trimming17 Feb 2026US 12,554,649 B2Google Inc.
- Method and system for providing a context-sensitive, non-intrusive data processing optimization framework20 Jan 2026US 12,530,356 B2Huawei Technologies Co., Ltd.
- Method and Device for Memory Scheduling for Code Generation for a Program Code for Computing an Artificial Neural Network in a Hardware Environment30 Apr 2026US 2026/0119137 A1Robert Bosch GmbH
- Tokenizers for Large Code Language Models19 Feb 2026US 2026/0050533 A1Aurora Labs Ltd.
- Indirect prefetcher training12 Feb 2026US 2026/0044345 A1Arm Limited
- Profile Guided Memory Trimming25 Sep 2025US 2025/0298747 A1Google Inc.
- Data Processing Method, Processor, Computing Device, and Apparatus17 Apr 2025US 2025/0123823 A1Huawei Technologies Co., Ltd.
Most cited
By later US patents
- Efficient explicit data prefetching analysis and code generation in a low-level optimizer for inserting prefetch instructions into loops of applications188US 5,704,053 AHewlett-Packard Company · 1997
- Method for determining a storage bandwidth optimized memory organization of an essentially digital device157US 6,421,809 B1Interuniversitaire Micro-Elektronica Centrum (IMEC VZW) · 2002
- Method and device for maximizing memory system bandwidth by accessing data in a dynamically determined order125US 6,154,826 AUniversity of Virginia Patent Foundation · 2000
- Method for optimizing computer code to provide more efficient execution on computers having cache memories124US 5,212,794 AHewlett-Packard Company · 1993
- Data structure partitioning with garbage collection to optimize cache utilization120US 6,321,240 B12001