G06F 2212/302
In image processor or graphics adapter
G06F2212/302 (In image processor or graphics adapter) appears on 246 US grants and 300 published applications in this corpus.
Search patents in G06F- Granted patents
- 246
- Published applications
- 300
- Assignees
- 40
- Inventors
- 498
- Latest grant
- 6 Oct 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 2003 | 1 | 0 |
| 2004 | 1 | 0 |
| 2005 | 0 | 0 |
| 2006 | 0 | 3 |
| 2007 | 1 | 1 |
| 2008 | 0 | 0 |
| 2009 | 2 | 0 |
| 2010 | 0 | 4 |
| 2011 | 1 | 2 |
| 2012 | 5 | 7 |
| 2013 | 8 | 8 |
| 2014 | 9 | 30 |
| 2015 | 7 | 9 |
| 2016 | 16 | 11 |
| 2017 | 15 | 19 |
| 2018 | 16 | 27 |
| 2019 | 24 | 16 |
| 2020 | 19 | 16 |
| 2021 | 15 | 17 |
| 2022 | 17 | 39 |
| 2023 | 17 | 21 |
| 2024 | 36 | 31 |
| 2025 | 23 | 25 |
| 2026 | 13 | 14 |
By publication year. 2026 runs to 8 Oct.
Recent patents
- Cache structure and utilization6 Oct 2026US 12,754,876 B2Intel Corporation
- Systems and methods for updating memory side caches in a multi-GPU configuration15 Sep 2026US 12,737,317 B2Intel Corporation
- Cache structure and utilization15 Sep 2026US 12,737,318 B2Intel Corporation
- Systems and methods for cache optimization8 Sep 2026US 12,730,759 B2Intel Corporation
- Multi-tile memory management for detecting cross tile access providing multi-tile inference scaling and providing page migration21 Jul 2026US 12,688,146 B2Intel Corporation
- Memory controller management techniques30 Jul 2026US 2026/0220078 A1Intel Corporation
- Systems and methods for updating memory side caches in a multi-gpu configuration23 Jul 2026US 2026/0211839 A1Intel Corporation
- Memory controller management techniques23 Jul 2026US 2026/0211840 A1Intel Corporation
- Immediate offset of load store and atomic instructions16 Jul 2026US 2026/0203060 A1Intel Corporation
- Prefetch aware lru cache replacement policy16 Jul 2026US 2026/0203234 A1Intel Corporation
Most cited
By later US patents
- Multiprocessor system implementing virtual memory using a shared memory, and a page replacement method for maintaining paged memory coherence80US 6,684,305 B1Advanced Micro Devices, Inc. · 2004
- Systems and methods implementing non-shared page tables for sharing memory resources managed by a main operating system with accelerator devices59US 8,719,543 B2Advanced Micro Devices, Inc. · 2014
- Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point format45US 11,361,496 B2Intel Corporation · 2022
- System and method for hardware-based GPU paging to system memory45US 7,623,134 B1NVIDIA Corporation · 2009
- System and method for cleaning dirty data in an intermediate cache using a data class dependent eviction policy43US 8,244,984 B1NVIDIA Corporation · 2012