G06F 2205/062
Allowing rewriting or rereading data to or from the buffer
G06F2205/062 (Allowing rewriting or rereading data to or from the buffer) appears on 40 US grants and 21 published applications in this corpus.
Search patents in G06F- Granted patents
- 40
- Published applications
- 21
- Assignees
- 26
- Inventors
- 63
- Latest grant
- 6 Jul 2021
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1989 | 1 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 2 | 0 |
| 1993 | 0 | 0 |
| 1994 | 1 | 0 |
| 1995 | 0 | 0 |
| 1996 | 1 | 0 |
| 1997 | 3 | 0 |
| 1998 | 0 | 0 |
| 1999 | 2 | 0 |
| 2000 | 1 | 0 |
| 2001 | 1 | 0 |
| 2002 | 1 | 0 |
| 2003 | 2 | 5 |
| 2004 | 4 | 3 |
| 2005 | 5 | 1 |
| 2006 | 1 | 0 |
| 2007 | 2 | 0 |
| 2008 | 1 | 1 |
| 2009 | 0 | 1 |
| 2010 | 1 | 2 |
| 2011 | 0 | 0 |
| 2012 | 0 | 1 |
| 2013 | 0 | 1 |
| 2014 | 3 | 1 |
| 2015 | 2 | 1 |
| 2016 | 1 | 1 |
| 2017 | 1 | 1 |
| 2018 | 1 | 0 |
| 2019 | 1 | 1 |
| 2020 | 1 | 1 |
| 2021 | 1 | 0 |
By publication year. Applications have been published since 2001.
Recent patents
- Signal transmission method and a circuit structure for heterogeneous platforms6 Jul 2021US 11,055,061 B2Realtek Semiconductor Corp.
- Real-time hierarchical protocol decoding17 Mar 2020US 10,592,376 B2Total Phase, Inc.
- Real-time hierarchical protocol decoding19 Feb 2019US 10,210,069 B2Total Phase, Inc.
- Systems and methods for low interference logging and diagnostics15 May 2018US 9,971,563 B2Amazon Technologies, Inc.
- System-on-chip and application processor including FIFO buffer and mobile device comprising the same10 Jan 2017US 9,542,152 B2Samsung Electronics Co., Ltd.
- Signal transmission method and a circuit structure for heterogeneous platforms9 Jul 2020US 2020/0218504 A1Realtek Semiconductor Corp.
- Real-time hierarchical protocol decoding9 May 2019US 2019/0138421 A1Total Phase, Inc.
- Systems and methods for low interference logging and diagnostics13 Apr 2017US 2017/0102919 A1Amazon Technologies, Inc.
- Real-time hierarchical protocol decoding28 Apr 2016US 2016/0117234 A1Total Phase, Inc.
- Real-time hierarchical protocol decoding13 Aug 2015US 2015/0229547 A1Total Phase, Inc.
Most cited
By later US patents
- Bidirectional FIFO buffer having reread and rewrite means92US 5,079,693 AIntegrated Device Technology, Inc. · 1992
- Data-packet fifo buffer system with end-of-packet flags85US 5,860,119 AVLSI Technology, Inc. · 1999
- Message FIFO buffer controller71US 4,873,666 ANorthern Telecom Limited · 1989
- First-in, first-out integrated circuit memory device incorporating a retransmit function68US 6,172,927 B2Ramtron International Corporation · 2001
- System and method for jitter compensation in data transfers68US 6,977,897 B1Crossroads Systems, Inc. · 2005