US 5,860,119 AGranted

Data-packet fifo buffer system with end-of-packet flags

AssigneeVLSI Technology, Inc.

InventorKenneth A. Dockser

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Abstract

A packet-data FIFO buffer system comprises a FIFO buffer with a series of FIFO memory locations. Each FIFO memory location includes a data section for storing a packet data word and a flag section for storing an indication of whether or not the associated data section includes the last word of a packet. The FIFO buffer capacity is not limited to the number of maximum length packets it can hold; instead, a greater number of small packets can be stored. This increases the effectiveness of available FIFO memory and minimizes communication delays along the channels serviced by the FIFO. The FIFO design is simple and fairly self contained so that minimal external logic and control is required. In addition, an indication of the presence or absence of a complete data packet in the FIFO buffer can be easily obtained by logically adding (ORing) the contents of the flag sections.

Claims1

Dependent claims

A FIFO buffer system for packet data including a series of data words, said system comprising:

a series of FIFO memory locations for holding packet data for transfer, said memory locations including respective data sections for storing one of said data words, said memory locations including respective flag sections for storing respective end-of-packet indications, each end-of-packet indication stored in an end-of-packet section indicating whether or not the data word stored in the respective one of said data sections is the last word of a packet;
boundary detection means for detecting whether or not the data word to be stored at a given one of said FIFO registers is or is not the last data word in a packet, said boundary detection means in the event the current data word is the last data word of a packet writing an indication to that effect in the respective end-of-packet section;
host interface means for, in a transmission mode, transmitting an outgoing data packet stored in said FIFO memory locations to a host system and for, in a reception mode, receiving an incoming data packet and storing it in said FIFO memory locations;
and
mode selection means for selecting between a purge mode and a wait mode, said FIFO buffer system when in purge mode purging all data in said FIFO memory locations in the event of a switch between said transmission mode and said reception mode, said FIFO buffer system wherein said wait mode transferring all data in said FIFO before completing a switch between said transmission mode and said reception mode.

2 more elements

Dependencies are inferred from the claim text.