G06F 15/8061
Details on data memory access
Official title: {Details on data memory access}
G06F15/8061 (Details on data memory access) appears on 280 US grants and 285 published applications in this corpus.
Search patents in G06F- Granted patents
- 280
- Published applications
- 285
- Assignees
- 76
- Inventors
- 482
- Latest grant
- 15 Sep 2026
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1978 | 1 | 0 |
| 1979 | 1 | 0 |
| 1980 | 0 | 0 |
| 1981 | 0 | 0 |
| 1982 | 0 | 0 |
| 1983 | 0 | 0 |
| 1984 | 0 | 0 |
| 1985 | 1 | 0 |
| 1986 | 2 | 0 |
| 1987 | 0 | 0 |
| 1988 | 3 | 0 |
| 1989 | 6 | 0 |
| 1990 | 4 | 0 |
| 1991 | 2 | 0 |
| 1992 | 5 | 0 |
| 1993 | 5 | 0 |
| 1994 | 3 | 0 |
| 1995 | 4 | 0 |
| 1996 | 4 | 0 |
| 1997 | 1 | 0 |
| 1998 | 0 | 0 |
| 1999 | 3 | 0 |
| 2000 | 0 | 0 |
| 2001 | 2 | 0 |
| 2002 | 0 | 1 |
| 2003 | 0 | 1 |
| 2004 | 0 | 5 |
| 2005 | 1 | 3 |
| 2006 | 1 | 0 |
| 2007 | 2 | 3 |
| 2008 | 3 | 2 |
| 2009 | 1 | 4 |
| 2010 | 3 | 3 |
| 2011 | 2 | 4 |
| 2012 | 1 | 3 |
| 2013 | 4 | 2 |
| 2014 | 4 | 5 |
| 2015 | 3 | 9 |
| 2016 | 6 | 7 |
| 2017 | 9 | 3 |
| 2018 | 17 | 74 |
| 2019 | 24 | 16 |
| 2020 | 23 | 30 |
| 2021 | 26 | 18 |
| 2022 | 19 | 15 |
| 2023 | 27 | 23 |
| 2024 | 29 | 25 |
| 2025 | 17 | 22 |
| 2026 | 11 | 7 |
By publication year. Applications have been published since 2001. 2026 runs to 8 Oct.
Subgroups
Granted patents
Recent patents
- Feature tracking15 Sep 2026US 12,737,182 B2NVIDIA Corporation
- Irregular cadence data processing units7 Jul 2026US 12,675,434 B2Google Inc.
- Methods and apparatus for eviction in dual datapath victim cache system16 Jun 2026US 12,657,134 B2Texas Instruments Incorporated
- Methods and apparatus for inflight data forwarding and invalidation of pending writes in store queue16 Jun 2026US 12,657,135 B2Texas Instruments Incorporated
- Methods and apparatus to facilitate read-modify-write support in a victim cache12 May 2026US 12,625,822 B2Texas Instruments Incorporated
- Methods and apparatus for eviction in dual datapath victim cache system1 Oct 2026US 2026/0300187 A1
- Methods and apparatus to facilitate read-modify-write support in a victim cache17 Sep 2026US 2026/0277825 A1
- Methods and Circuits for Streaming Data to Processing Elements in Stacked Processor-Plus-Memory Architecture16 Jul 2026US 2026/0203251 A1Rambus Inc.
- Arithmetic device and data movement method2 Jul 2026US 2026/0187026 A1Denso Corporation
- Accelerated computation of direct memory access scatter context for get response11 Jun 2026US 2026/0161584 A1Hewlett Packard Enterprise Development LP
Most cited
By later US patents
- Vector processor system420US 8,356,144 B22013
- Complex arithmetic vector processor for performing control function, scalar operation, and set-up of vector signal processing instruction172US 4,760,525 AThe United States of America as represented by the Secretary of the Air Force · 1988
- Pipelined apparatus and method for controlled loading of floating point data in a microprocessor157US 5,155,816 AIntel Corporation · 1992
- Method and apparatus using a cache and main memory for both vector processing and scalar processing by prefetching cache blocks including vector data elements124US 4,888,679 ADigital Equipment Corporation · 1989
- Apparatus for out-of-order program execution121US 4,722,049 AUnisys Corporation · 1988