Hyperchip Inc.
Sutton, Quebec, CA· latest recorded location
Hyperchip Inc. is named on 18 US grants and 12 published applications in this corpus. Its most frequent classification is G06F (Computing and data processing).
- Granted patents
- 18
- Published applications
- 12
- Inventors
- 13
- Granted in 2026 so far
- 0
- Most recent grant
- 28 Feb 2012
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 2000 | 2 | 0 |
| 2001 | 0 | 0 |
| 2002 | 3 | 4 |
| 2003 | 3 | 6 |
| 2004 | 4 | 1 |
| 2005 | 3 | 0 |
| 2006 | 0 | 1 |
| 2007 | 0 | 0 |
| 2008 | 0 | 0 |
| 2009 | 1 | 0 |
| 2010 | 1 | 0 |
| 2011 | 0 | 0 |
| 2012 | 1 | 0 |
By publication year.
Technology areas
Share of 30 documents
- G06FComputing and data processing8
- G09GArrangements or circuits for control of indicating devices using static means to6
- H04LDigital communication6
- H05KPrinted circuits6
- G02FOptical devices or arrangements for the control of light by modification of5
- H10FSolar cells and light sensors5
- H03KPulse technique4
- G01RMeasuring electric variables2
- G02BOptical elements, systems or apparatus2
- G03FPhotomechanical production of textured or patterned surfaces2
Recent patents
- Method and system for congestion avoidance in packet switching devices28 Feb 2012US 8,125,902 B2
- Methods and apparatus for storage and processing of routing information14 Sep 2010US 7,796,587 B2
- Communications bus for a parallel processing system9 Jun 2009US 7,546,570 B2
- Fault tolerant scan chain for a parallel processing system9 Aug 2005US 6,928,606 B2
- Methods, apparatus, and systems for reducing interference on nearby conductors24 May 2005US 6,897,497 B2
- Methods and apparatus for storage and processing of routing information29 Jun 2006US 2006/0140185 A1
- Circuit breaker module safety device and method19 Feb 2004US 2004/0031669 A1
- Method of generating large scale signal paths in a parallel processing system24 Jul 2003US 2003/0138705 A1
- Communications bus for a parallel processing system24 Jul 2003US 2003/0140188 A1
- Methods, apparatus, and systems for reducing interference on nearby conductors26 Jun 2003US 2003/0116827 A1
Most cited
By later US patents
- Efficient direct replacement cell fault tolerant architecture131US 6,408,402 B12002
- Efficient direct replacement cell fault tolerant architecture117US 6,154,855 A2000
- Fault tolerant data processing system fabricated on a monolithic substrate80US 6,038,682 A2000
- Midplane for data processing apparatus65US 6,608,762 B22003
- Compact shelf unit for electronic equipment rack45US 6,499,609 B22002