Fujitsu Microelectronics Limited
San Jose, CA, US· latest recorded location
Fujitsu Microelectronics Limited is named on 5 US grants and 0 published applications in this corpus. Its most frequent classification is G06T (Image data processing or generation, in general).
- Granted patents
- 5
- Published applications
- 0
- Inventors
- 6
- Granted in 2026 so far
- 0
- Most recent grant
- 26 Mar 2002
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1986 | 1 | 0 |
| 1987 | 0 | 0 |
| 1988 | 0 | 0 |
| 1989 | 0 | 0 |
| 1990 | 0 | 0 |
| 1991 | 0 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 1 | 0 |
| 1998 | 0 | 0 |
| 1999 | 0 | 0 |
| 2000 | 2 | 0 |
| 2001 | 0 | 0 |
| 2002 | 1 | 0 |
By publication year.
Technology areas
Share of 5 documents
Recent patents
- High voltage buffer for submicron CMOS26 Mar 2002US 6,362,652 B1
- Method of compressing and decompressing graphics images3 Oct 2000US 6,128,406 A
- Method of compressing and decompressing graphic images18 Jul 2000US 6,091,850 A
- Feedback controlled load logic circuit26 Aug 1997US 5,661,411 A
- Method for manufacturing a gate array integrated circuit device22 Apr 1986US 4,584,653 A
No published applications.
Most cited
By later US patents
- Method for manufacturing a gate array integrated circuit device55US 4,584,653 A1986
- High voltage buffer for submicron CMOS13US 6,362,652 B12002
- Method of compressing and decompressing graphics images10US 6,128,406 A2000
- Method of compressing and decompressing graphic images8US 6,091,850 A2000
- Feedback controlled load logic circuit6US 5,661,411 A1997