Single gate MOS type nonvolatile memory and operating method thereof

Abstract

The present invention provides nonvolatile semiconductor memory which has advantages permitting the cell of the memory circuit to integrate, the memory circuit to be easy to manufacture, and the manufacturing expense to be cut down. The nonvolatile memory (21) comprises a P type well (2) for which a N+ type source (4) and a N+ type drain (3) is provided. A surface of a space between the source (4) and the drain (3) comprises a first portion (10a) and a second portion (10b). An insulating layer (6) for holding electrons spans the surface of the first portion (10a). A memory gate electrode (5) is on the insulating layer (6) and spans the first portion (10a). A conductive body 23 is provided on an insulating layer (8) so that it spans the second portion (10b) and is electrically disconnected from the memory gate electrode (5).

Dependencies are inferred from the claim text.