US 2026/0040592 A1 · SEMICONDUCTOR PACKAGE INCLUDING PASSIVE COMPONENTS

Abstract

A semiconductor package includes a semiconductor chip disposed on a substrate; a first passive component and a second passive component disposed on the substrate; and an encapsulant disposed on the substrate and covering the semiconductor chip, the first passive component, and the second passive component. A first electrode is disposed on an insulating layer of the substrate between the first passive component and the insulating layer. A second electrode is disposed on the insulating layer between the second passive component and the insulating layer and spaced apart from the first electrode. A first dam structure is disposed on the insulating layer. The first dam structure includes a support pattern and a solder resist layer surrounding the support pattern. The first dam structure is disposed between the first electrode and the second electrode.

Claims21

Dependent claims

A semiconductor package comprising:

a substrate;
a semiconductor chip disposed on the substrate;
a first passive component and a second passive component disposed on the substrate;
and
an encapsulant disposed on the substrate and covering the semiconductor chip, the first passive component, and the second passive component,
the substrate comprising:
an insulating layer;
a first electrode disposed on the insulating layer between the first passive component and the insulating layer in a third direction;
a second electrode disposed on the insulating layer between the second passive component and the insulating layer in the third direction and spaced apart from the first electrode in a first direction perpendicular to the third direction;
and
a first dam structure disposed on the insulating layer, the first dam structure disposed between the first electrode and the second electrode and comprising:
a support pattern;
and
a solder resist layer surrounding the support pattern.

11 more elements

A semiconductor package comprising:

an insulating layer;
a first electrode disposed on the insulating layer;
a first passive component disposed on the first electrode;
a second electrode disposed on the insulating layer and spaced apart from the first electrode in a first direction;
a second passive component disposed on the second electrode;
a first support pattern disposed between the first electrode and the second electrode and disposed on the insulating layer;
and
a solder resist layer surrounding the first support pattern.

5 more elements

Dependencies are inferred from the claim text.

Semiconductor package including passive components

Life of this patent

Semiconductor package including passive components

Life of this patent

Abstract

Claims21