Static random access memory

A static random access memory (SRAM), comprising first and second SRAM cells disposed adjacent to each other in a first direction,

• wherein each of the first and second SRAM cells comprises:
• first and second pass-gate transistors disposed at opposite sides of the respective SRAM cell in the first direction;
• and
• a plurality of data storage transistors formed in a region between the first and second pass-gate transistors of the respective SRAM cell,
• the second pass-gate transistor of the first SRAM cell and the first pass-gate transistor of the second SRAM cell are disposed between the region forming the plurality of data storage transistors of the first SRAM cell and the region forming the plurality of data storage transistors of the second SRAM cell,
• a source diffusion region, by which a source region of the second pass-gate transistor of the first SRAM cell is formed and which extends in a second direction perpendicular to the first direction, and a source diffusion region, by which a source region of the first pass-gate transistor of the second SRAM cell is formed and which extends in the second direction, do not overlap with each other in the first direction, and
• all of the source diffusion regions in each of the first and second SRAM cells are spaced-apart from each other in the first direction.

A static random access memory (SRAM), comprising first and second SRAM cells disposed adjacent to each other in a column direction,

• wherein each of the first and second SRAM cells comprises:
• first and second pass-gate transistors disposed at opposite sides of the respective SRAM cell in a row direction perpendicular to the column direction;
• and
• a plurality of data storage transistors disposed between the opposite sides of the respective SRAM cell,
• source regions of the first pass-gate transistors of the first and second SRAM cells are formed by different source diffusion regions spaced-apart from each other by an insulation region, or source regions of the second pass-gate transistors of the first and second SRAM cells are formed by different source diffusion regions spaced-apart from each other by an insulation region, and
• the source diffusion regions, by which the source regions of the second pass-gate transistors of the first and second SRAM cells are formed, are located at the same side of the plurality of data storage transistors of the first and second SRAM cells.