US 2010/0163955 A1 · SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE

Abstract

A semiconductor memory device is provided including: a spacer shaped floating gate formed on a semiconductor substrate; a dielectric layer spacer formed at one side wall of the floating gate; a third oxide layer formed over the floating gate and the dielectric layer; and a control gate formed over the third oxide layer. According to an embodiment, the structure of the floating gate in a plate shape whose center is concave is improved to the spacer structure, making it possible to minimize the size of the semiconductor memory device and to improve density. Moreover, a LOCOS process can be excluded while forming the floating gate, making it possible to more efficiently fabricate the device.

Claims12

Dependent claims

A manufacturing method of a semiconductor memory device, comprising:

forming a nitride pattern on a semiconductor substrate;
forming a floating gate in a spacer shape at a side wall of the nitride pattern;
forming a first oxide layer at a side wall of the floating gate;
removing the nitride pattern;
forming a dielectric layer spacer at an exposed side wall of the floating gate, the exposed side wall of the floating gate being exposed by the removing of the nitride pattern;
forming a third oxide layer over the first oxide layer, the dielectric layer, and the semiconductor substrate;
forming a polysilicon layer over the third oxide layer;
and
etching portions of the polysilicon layer, the third oxide layer, and the first oxide layer to form a control gate over the floating gate, the dielectric layer spacer, and a part of the first oxide layer.

6 more elements

Dependencies are inferred from the claim text.

Semiconductor memory device and manufacturing method of semiconductor memory device

Life of this patent

Semiconductor memory device and manufacturing method of semiconductor memory device

Life of this patent

Abstract

Claims12