Semiconductor devices and fabrication methods thereof

A semiconductor device, comprising:

• a semiconductor substrate;
• a first dielectric layer with a first conductor line along a first direction disposed on the semiconductor substrate, wherein the top surface of the first conductor line is lower than the top surface of the first dielectric layer;
• a second dielectric layer comprising a first opening and a second opening disposed on the first dielectric layer;
• a first semiconductor diode component comprising:
• a first diode element disposed on the first conductor line, wherein the top surface of the first diode element is level with the top surface of the first dielectric layer;
• and
• a second diode element and a third diode element filled in the first opening;
• a second semiconductor diode component comprising:
• a fourth diode element disposed on the first conductor line, wherein the top surface of the fourth diode element is level with the top surface of the first dielectric layer;
• a fifth diode element and a sixth diode element filled in the second opening.

A method for fabricating a semiconductor device, comprising:

• providing a semiconductor substrate;
• forming a first dielectric layer with a first conductor line along a first direction on the semiconductor substrate, wherein the top surface of the first conductor line is lower than the top surface of the first dielectric layer;
• forming a semiconductor diode component, comprising:
• forming a first diode element on the first conductor line, wherein the top surface of the first diode element is level with the top surface of the first dielectric layer;
• forming a second dielectric layer on the first dielectric layer, the second dielectric layer comprising an opening corresponding to the first diode element;
• and
• filling the opening with a second diode element and a third diode element.

A method for fabricating a semiconductor device, comprising:

• providing a semiconductor substrate;
• forming a first dielectric layer with a trench therein;
• conformably depositing a buffer layer and a first conductive layer on the first dielectric layer filling the trench;
• planarizing the buffer layer and the first conductive layer until exposing the first dielectric layer;
• and
• etching the buffer layer and the first conductive layer such that the top surface of the first conductor line is lower than the top surface of the first dielectric layer;
• forming a first diode element on the first conductor line, wherein the top surface of the first diode element is level with the top surface of the first dielectric layer;
• forming a second dielectric layer on the first dielectric layer, the second dielectric layer comprising an opening corresponding to the first diode element;
• and
• filling the opening with a second diode element and a third diode element.