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US 2002/0000600 A1Published application
Semiconductor memory
AssigneeMatsushita Electronics Corporation
InventorsYOSHIHISA NAGANO, SHINICHIRO HAYASHI, YASUHIRO UEMOTO
Life of this patent
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Abstract
A semiconductor memory includes plural lower electrodes formed on a semiconductor substrate; a capacitor dielectric film of an insulating metal oxide continuously formed over the plural lower electrodes; plural upper electrodes formed on the capacitor dielectric film in positions respectively corresponding to the plural lower electrodes; and plural transistors formed on the semiconductor substrate. The plural lower electrodes are respectively connected with source regions of the plural transistors.
Claims8
A semiconductor memory comprising:
- plural lower electrodes formed on a semiconductor substrate;
- a capacitor dielectric film of an insulating metal oxide continuously formed over said plural lower electrodes;
- plural upper electrodes formed on said capacitor dielectric film in positions respectively corresponding to said plural lower electrodes;
- and
- plural transistors formed on said semiconductor substrate, wherein said plural lower electrodes are respectively connected with source regions of said plural transistors.
2 more elements
A semiconductor memory comprising:
- plural lower electrodes formed on a semiconductor substrate;
- a capacitor dielectric film of an insulating metal oxide continuously formed over said plural lower electrodes;
- an upper electrode formed over said capacitor dielectric film;
- and
- plural transistors formed on said semiconductor substrate, wherein said plural lower electrodes are respectively connected with source regions of said plural transistors.
2 more elements
Dependencies are inferred from the claim text.