Method of forming mask with reduced feature sizes

A method of manufacturing a semiconductor device, comprising:

• providing a substrate;
• forming a plurality of first mask layers over the substrate, wherein each of the first mask layers extends along a first direction;
• forming a plurality of second mask layers over the substrate, wherein each of the second mask layers extends along a second direction different from the first direction;
• forming a plurality of islands over the plurality of second mask layers;
• forming an opening pattern definition layer on the plurality of islands to define a plurality of first openings;
• removing the plurality of islands to form a plurality of second openings;
• forming a cut pattern by removing the plurality of second mask layers overlapping the second openings and the first openings along a third direction orthogonal to the first direction and the second direction;
• patterning the plurality of first mask layers by the cut pattern;
• and
• patterning the substrate to define an active region;
• wherein the opening pattern definition layer is formed by an atomic deposition layer process;
• wherein forming the plurality of second mask layers comprises:
• forming a dielectric layer over the plurality of first mask layers;
• forming a photoresist pattern over the dielectric layer;
• forming a pitch definition layer on the plurality of photoresist pattern;
• and
• patterning the dielectric layer by removing the dielectric layer not overlapping the pitch definition layer along the third direction.