Matching method for semiconductor topography measurement and processing device using the same

A processing device implemented in an Atomic Force Microscope (AFM) semiconductor topography measurement system, for matching a surface topography detected from a semiconductor device with a circuit layout of the semiconductor device, to accurately determine a measurement straight line path in the circuit layout used by the AFM during actual scanning, the processing device comprising:

• a receiving unit, configured to receive an original surface topography curve and the circuit layout of the semiconductor device, wherein the original surface topography curve is measured by the AFM along the measurement straight line path of the semiconductor device;
• a surface topography variation analysis unit, configured to convert the original surface topography curve into a surface topography variation curve;
• a conductor density variation analysis unit, configured to generate a plurality of conductor density variation curves along a plurality of layout straight-line paths on the circuit layout;
• a weighted correlation analysis unit, configured to analyze a weighted correlation between the surface topography variation curve and each of the conductor density variation curves according to a plurality of weighted values respectively corresponding to a plurality of topography variation observation intervals of the surface topography variation curve;
• and
• a fitting unit, configured to select the measurement straight line path matching the original surface topography curve from among the layout straight-line paths according to the weighted correlations, whereby alignment accuracy between a measurement data of the AFM and the circuit layout is improved for circuit pattern verification and process control.