Back to results
US 12,193,235 B2Granted
Nonvolatile memory device and apparatus including the same
AssigneeSamsung Electronics Co., Ltd.
InventorsYoungtek Oh, Hyeyoung Kwon, Taein Kim, Gukhyon Yon, Minhyun Lee
Life of this patent
Estimating the term…
Abstract
A nonvolatile memory device includes a channel layer, a plurality of gate electrodes and a plurality of separation layers spaced apart from the channel layer and alternately arranged, a charge trap layer between the gate electrodes in the channel layer, and a charge blocking layer between the charge trap layer and the gate electrode.
Claims21
A nonvolatile memory device comprising:
- a channel layer extending in a first direction;
- a plurality of gate electrodes and a plurality of separation layers spaced apart from the channel layer and alternately arranged in the first direction;
- a plurality of charge trap layers between the plurality of gate electrodes and the channel layer;
- and
- a plurality of charge blocking layers between the plurality of charge trap layers and the plurality of gate electrodes, wherein
- the plurality of separation layers separate the plurality of charge trap layers from each other,
- the plurality of separation layers separate the plurality of charge blocking layers from each other, and
- each corresponding charge trap layer among the plurality of charge trap layers, corresponding charge blocking layer among the plurality of charge blocking layers, and corresponding gate electrode among the plurality of gate electrodes is in direct contact with a corresponding separation layer among the plurality of separation layers.
5 more elements
A nonvolatile memory device comprising:
- a common source line;
- and
- a plurality of strings connected to the common source line,
- each of the plurality of strings including a channel layer extending in a first direction, a charge tunneling layer extending in the first direction along the channel layer, a plurality of separation layers and a plurality of charge trap layers alternately arranged in the first direction along a surface of the charge tunneling layer, a plurality of gate electrodes alternately arranged in the first direction with the plurality of separation layers, and a plurality of charge blocking layers alternately arranged in the first direction with the plurality of separation layers,
- the plurality of strings being spaced apart from each other,
- the charge tunneling layer extending between the channel layer and the plurality of charge trap layers,
- the plurality of charge blocking layers separating the plurality of gate electrodes from the plurality of charge trap layers, and
- the plurality of charge trap layers separating the plurality of separation layers from each other, wherein
- in each of the plurality of strings, each corresponding gate electrode among the plurality of gate electrodes is in direct contact with a corresponding separation layer among the plurality of separation layers.
6 more elements
Dependencies are inferred from the claim text.