Y10S 505/84
Location addressed, i.e. word organized memory type
Y10S505/84 (Location addressed, i.e. word organized memory type) appears on 2 US grants and 0 published applications in this corpus.
Search patents in Y10S- Granted patents
- 2
- Published applications
- 0
- Assignees
- 2
- Inventors
- 7
- Latest grant
- 7 Sep 2004
Filings by year
| Year | Granted patents | Published applications |
|---|---|---|
| 1991 | 1 | 0 |
| 1992 | 0 | 0 |
| 1993 | 0 | 0 |
| 1994 | 0 | 0 |
| 1995 | 0 | 0 |
| 1996 | 0 | 0 |
| 1997 | 0 | 0 |
| 1998 | 0 | 0 |
| 1999 | 0 | 0 |
| 2000 | 0 | 0 |
| 2001 | 0 | 0 |
| 2002 | 0 | 0 |
| 2003 | 0 | 0 |
| 2004 | 1 | 0 |
By publication year. Applications have been published since 2001.
Recent patents
- Method and system for storing information using nano-pinned dipole magnetic vortices in superconducting materials7 Sep 2004US 6,787,798 B1The Texas A&M University System
- Superconductor storage device and memory using superconductor storage devices as memory cells24 Sep 1991US 5,051,787 AHitachi, Ltd.
No published applications in this class yet.
Most cited
By later US patents