Method for semiconductor self-aligned patterning
AssigneeNanya Technology Corporation
InventorsAn Hsiung Liu, Ya Chih Wang
Life of this patent
Estimating the term…
Abstract
A method for semiconductor self-aligned patterning includes steps of providing a substrate comprising a first layer and a second layer, wherein the first layer is on top of the second layer; removing a portion of the first layer to form a first pattern; depositing a first conformal layer on the first pattern; depositing a second conformal layer on the first conformal layer; removing a portion of the second conformal layer to expose a portion of the first conformal layer; and thinning the first conformal layer and the second conformal layer alternatively to form a second pattern. A semiconductor self-aligned structure is also provided.
Claims10
A semiconductor self-aligned structure, comprising:
- a carrier;
- a first pattern with a first feature size that is positioned above the carrier, wherein the first feature size is a space between adjacent;
- first features, wherein the first feature size being smaller than that obtainable by a photoresist pattern printing, and the first pattern is symmetric about a central axis;
- and
- a second pattern with a second feature size that is positioned on the carrier, wherein the second feature size is a space between adjacent second features;
- and in which materials composing a first portion of the second pattern are different from materials composing a second portion of the second pattern;
- wherein the first portion is above the carrier, the second portion is above the first portion such that the first portion is sandwiched between the second portion and the carrier;
- wherein width of the first portion is substantially the same as width of the second portion;
- wherein width is measured in the same direction as feature size;
- and
- wherein a sidewall of the first portion is not covered by the materials composing the second portion.
Dependencies are inferred from the claim text.