Method for fabricating a connection region in a semiconductor device

#The present invention relates to a method of fabricating a high-integrated semiconductor device, and more specifically, to a method of forming a field effect transistor on a partially insulated semiconductor substrate.

#In a system comprising a plurality of semiconductor devices, a semiconductor memory apparatus is configured to store data generated or processed therein. For example, if a request from a data processor such as a central processing unit (CPU) is received, the semiconductor memory apparatus outputs data to the data processor from unit cells therein or stores data processed by the data processor to the unit cells, according to an address transmitted with the request.

#Although data storage capacity of semiconductor memory apparatus has increased, sizes of semiconductor memory apparatus have not increased proportionally. Thus, various elements and components used for read or write operations in the semiconductor memory apparatus have also reduced in size. Accordingly, components and elements unnecessarily duplicated in the semiconductor memory apparatus, such as transistors or wires, are combined or merged to reduce the area occupied by each component. Particularly, the reduction of the size of unit cells included in the semiconductor memory apparatus affects improvement of integration.

#FIGS. 1a to 1h are cross-sectional views for illustrating a method of fabricating a semiconductor device according to an embodiment of the present invention.

#The present invention can be applied to fabricate a transistor in a cell region of the semiconductor memory device or a transistor located in a peripheral region thereof. Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.

#FIGS. 1a to 1g are cross-sectional views for illustrating a method of fabricating a semiconductor device according to an embodiment of the present invention.

#Referring to FIG. 1a, an SOI substrate for the use in fabricating a semiconductor device includes a lower silicon layer 102, a buried insulating film 104 and an upper silicon layer 106. In detail, the lower silicon layer 102 is doped with a p-type dopant, and applied with a body voltage of about −0.8 V during the operation of the semiconductor device. In addition, the buried insulating film 104 serves to prevent the lower silicon layer 102 and the upper silicon layer 106 from being electrically connected to each other, and the upper silicon layer 106 is a region positioned over the buried insulating film 104 to form semiconductor devices, and is formed at a thickness of about 1400 to 1600 Å. Here, the buried insulating film 104 makes a barrier film unnecessary that must be formed by injecting ions into a lower portion of an active region so as to prevent a punch through phenomenon when a conventional bulk silicon substrate is used to fabricate a semiconductor device. Therefore, as compared with a conventional process for fabricating a semiconductor device, the present invention has an advantage of reducing the number of process steps.