Integrated circuits having laterally confined epitaxial material overlying fin structures and methods for fabricating same

A method for fabricating an integrated circuit comprising:

• providing fin structures overlying a semiconductor substrate, wherein each fin structure has fin sidewalls parallel to a fin axis extending in a longitudinal direction perpendicular to a lateral direction;
• forming gate structures overlying the fin structures and transverse to the fin axis;
• depositing a dielectric material overlying the gate structures and fin structures, wherein the dielectric material covers selected fin structures and non-selected fin structures;
• etching trenches into the dielectric material to expose the selected fin structures;
• and
• growing an epitaxial material on the selected fin structures and confining growth of the epitaxial material in the lateral direction with the dielectric material while covering the non-selected fin structures with the dielectric material.

An integrated circuit comprising:

• a semiconductor substrate;
• a fin structure overlying the semiconductor substrate and having two sidewalls parallel to a fin axis and a top surface extending between the sidewalls at a height over the semiconductor substrate;
• a gate structure overlying the fin structure and defining a channel region and source/drain regions in the fin structure;
• and
• epitaxial material overlying the top surface of the fin structure at the source/drain regions, wherein the epitaxial material has side surfaces substantially parallel to the fin axis and substantially perpendicular to the semiconductor substrate, wherein each side surface extends downward from an upper edge and terminates at the height of the fin structure.