Semiconductor device

A semiconductor device, comprising:

• an antenna switch having a transmission terminal, an antenna terminal, and a reception terminal,
• wherein the antenna switch is a semiconductor device having:
• (a) a plurality of first field effect transistors coupled in series between the transmission terminal and the antenna terminal;
• and
• (b) a plurality of second field effect transistors coupled in series between the reception terminal and the antenna terminal, and
• wherein, between a source region and a drain region of each of the second field effect transistors coupled in series, a capacitance circuit is coupled which has a voltage dependency such that, in either of cases where a positive voltage is applied to the drain region based on a potential of the source region and where a negative voltage is applied to the drain region based on the potential of the source region, a capacitance decreases to a value smaller than that in a state where the potential of the source region and a potential of the drain region are at the same level,
• wherein the capacitance circuit comprises a first MOS diode capacitance element and a second MOS diode capacitance element which are formed over a SOI substrate including a support substrate, a buried insulating layer formed over the support substrate, and a semiconductor layer formed over the buried insulating layer,
• wherein the first MOS diode capacitance element has:
• (c1) a first semiconductor region of a first conductivity type formed in the semiconductor layer;
• (c2) a first capacitance insulating film formed over the first semiconductor region;
• and
• (c3) a first electrode formed over the first capacitance insulating film,
• wherein the second MOS diode capacitance element has:
• (d1) a second semiconductor region of the first conductivity type formed in the semiconductor layer;
• (d2) a second capacitance insulating film formed over the second semiconductor region;
• and
• (d3) a second electrode formed over the second capacitance insulating film, and
• wherein the capacitance circuit includes a first terminal electrically coupled to the first semiconductor region of the first MOS diode capacitance element, and a second terminal electrically coupled to the second semiconductor region of the second MOS diode capacitance element, and has a configuration in which the first electrode of the first MOS diode capacitance element is electrically coupled to the second electrode of the second MOS diode capacitance element.