Low resistance and reliable copper interconnects by variable doping

A method for fabricating a metal alloy interconnect in a semiconductor device, the method comprising:

• defining an interconnect boundary profile, comprising vias or trenches, on a substrate material;
• depositing a seed layer comprising a primary metal along the interconnect boundary profile on the substrate material;
• plating the primary metal and one or more impurities together to form a first layer of interconnect over the seed layer, wherein the first layer of interconnect comprising the primary metal and one or more impurities;
• and
• plating the primary metal and one or more impurities together to form a second layer of interconnect over the first layer of interconnect, the second layer of interconnect comprising the primary metal and one or more impurities, wherein the second layer of interconnect is thicker than the first layer of interconnect and the second layer of interconnect has a lower electrical resistance than the first layer of interconnect.