Semiconductor memory device

A semiconductor memory device comprising:

• a semiconductor layer;
• a first gate insulating layer over the semiconductor layer;
• an insulating layer over the first gate insulating layer;
• a first gate electrode over the semiconductor layer with the first gate insulating layer interposed therebetween, wherein the first gate electrode is provided in the insulating layer;
• a first conductive layer provided in the insulating layer;
• an oxide semiconductor layer in contact with the first gate electrode, the first conductive layer, and side surfaces of a groove portion in the insulating layer;
• a second gate insulating layer covering the oxide semiconductor layer;
• a second gate electrode provided over the oxide semiconductor layer with the second gate insulating layer interposed therebetween;
• and
• a capacitor comprising a second conductive layer formed from the same layer and of the same material as the second gate electrode,
• wherein the oxide semiconductor layer and the second gate insulating layer are interposed between the second conductive layer and the first gate electrode.

A semiconductor memory device comprising:

• a semiconductor layer;
• a first gate insulating layer over the semiconductor layer;
• an insulating layer over the first gate insulating layer;
• a first gate electrode over the semiconductor layer with the first gate insulating layer interposed therebetween, wherein the first gate electrode is provided in the insulating layer;
• a conductive layer provided in the insulating layer;
• an oxide semiconductor layer in contact with the first gate electrode, the conductive layer, side surfaces of a groove portion in the insulating layer, and the first gate insulating layer;
• a second gate insulating layer covering the oxide semiconductor layer;
• and
• a second gate electrode provided over the oxide semiconductor layer with the second gate insulating layer interposed therebetween.