Semiconductor wafer with assisting dicing structure and dicing method thereof

A method for dicing a semiconductor wafer, comprising:

• providing a semiconductor wafer having a front surface and a rear surface, wherein the front surface of the semiconductor wafer comprises at least two device regions separated by at least one dicing lane;
• forming a plurality of pre-dicing trenches in the rear surface of the semiconductor wafer and without passing therethrough and substantially aligned with the dicing lane, wherein the plurality of pre-dicing trenches are arranged in a line extending along an extending direction of the dicing lane and each pre-dicing trench has a width less than that of the dicing lane;
• and
• sawing through the semiconductor wafer, such that the sawing cuts partially through the plurality of pre-dicing trenches.