Polysilicon resistor formation in a gate-last process
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChun-Hung Huang, Jyh-Huei Chen
Life of this patent
Estimating the term…
Loading patent…
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChun-Hung Huang, Jyh-Huei Chen
Estimating the term…
A method includes forming a polysilicon layer over a substrate, forming a hard mask over the polysilicon layer, and doping a first portion of the hard mask with a dopant to form a doped hard mask region, wherein a second portion of the hard mask is not doped with the dopant. An etching step is performed to etch the first and the second portions of the hard mask, wherein the second portion of the hard mask is removed, and wherein at least a bottom portion of the doped hard mask region is not removed. After the etching step, the bottom portion of the doped hard mask region is removed. Electrical connections are formed to connect to a portion of the polysilicon layer in order to form a resistor.
A method comprising:
A method comprising:
A method comprising:
Dependencies are inferred from the claim text.