Optical proximity correction aware integrated circuit design optimization

A data processing system adapted for performing a convolution of a kernel over a layout, comprising:

• a processor and memory storing a layout file, a library of shape modifications, and instructions executable by the processor;
• the layout file specifying an integrated circuit design including a plurality of cells, the layout file specifying shapes of components of the cells, placements of the plurality of cells, and interconnections among the cells;
• the library of shape modifications for components of cells, the library including data indicating adjustments of a circuit parameter of the cells which result from applying the shape modifications to the cells;
• the instructions including logic to identify a cell in the layout file for adjustment of the circuit parameter, to select a shape modification for the identified cell from the library of shape modifications, and to apply the shape modification to the identified cell in the layout file using the selected shape modification to produce a modified layout file, wherein the identified cell has a plurality of transistors.

An article of manufacture comprising:

• a non-transitory machine readable data storage medium storing a layout file, a library of shape modifications, and instructions executable by the processor;
• the layout file specifying an integrated circuit design including a plurality of cells including at least one cell having a plurality of transistors, the layout file specifying shapes of components of the cells, placements of the plurality of cells, and interconnections among the cells;
• the library of shape modifications for components of cells including at least one cell having a plurality of transistors, the library including data indicating adjustments of a circuit parameter of the cells which result from applying the shape modifications to the cells;
• the instructions including logic to identify a cell in the layout file for adjustment of the circuit parameter;
• select a shape modification for the identified cell from the library of shape modifications;
• and apply the shape modification to the identified cell in the layout file using the selected shape modification to produce a modified layout file, the identified cell having a plurality of transistors.

An article of manufacture comprising:

• a non-transitory machine readable data storage medium storing a modified layout file created by a method for modifying a layout file specifying an integrated circuit design including a plurality of cells, the layout file specifying shapes of components of the cells, placements of the plurality of cells, and interconnections among the cells, the method comprising:
• storing a library of shape modifications for components of cells including at least one cell having a plurality of transistors, the library including data indicating adjustments of a circuit parameter of the cells which result from applying the shape modifications to the cells;
• identifying a cell in the layout file for adjustment of the circuit parameter, the identified cell having a plurality of transistors;
• selecting a shape modification for the identified cell from the library of shape modifications;
• and
• applying the shape modification to the identified cell in the layout file using the selected shape modification to produce the modified layout file.

An integrated circuit comprising:

• an integrated circuit component manufactured using a modified layout file created by a method for modifying a layout file specifying an integrated circuit design including a plurality of cells, the layout file specifying shapes of components of the cells, placements of the plurality of cells, and interconnections among the cells, the method comprising:
• storing a library of shape modifications for components of cells including at least one cell having a plurality of transistors, the library including data indicating adjustments of a circuit parameter of the cells which result from applying the shape modifications to the cells;
• a computer system identifying a cell in the layout file for adjustment of the circuit parameter, the identified cell having a plurality of transistors;
• a computer system selecting a shape modification for the identified cell from the library of shape modifications;
• and
• applying the shape modification to the identified cell in the layout file using the selected shape modification to produce the modified layout file.