Semiconductor discharge devices and methods of formation thereof

A semiconductor structure comprising:

• a well region comprising a plurality of transistors disposed in a substrate;
• a first discharge device comprising a first transistor having a first source/drain region, a second source/drain region, and a first gate region, wherein the first source/drain region is coupled to the well region, wherein the second source/drain region is coupled to a low voltage node, and wherein the first gate region is coupled to a first antenna;
• and
• a second transistor having a third source/drain region, a fourth source/drain region, and a second gate region, wherein the third source/drain region is coupled to the well region, wherein the fourth source/drain region is coupled to the low voltage node, wherein the second gate region is coupled to a second antenna, wherein the first transistor is a different type of transistor from the second transistor.

A method of fabricating a semiconductor structure, the method comprising:

• forming a first well region comprising a plurality of transistors in a first region of a substrate;
• forming a second well region in a second region of the substrate;
• forming a first discharge device in the substrate, the first discharge device being coupled between the first well region and the second well region;
• and
• transferring charge from the first well region to the second well region through the first discharge device during subsequent steps of fabricating the semiconductor structure.

A method of fabricating a semiconductor device, the method comprising:

• forming a first well region having a first doping type within a substrate;
• forming a second well region having a second doping type within the first well region, the second doping type being opposite to the first doping type;
• forming a third well region having the first doping type within the second well region, the third well region comprising a plurality of transistors;
• forming a first transistor within and/or above the substrate, the first transistor being coupled between the third well region and a low voltage node;
• and
• during subsequent fabrication of the semiconductor device, discharging charge accumulated in the third well region using the first transistor.

A method of forming a semiconductor device, the method comprising:

• forming a well region within a substrate;
• forming a plurality of transistors within and/or over the well region;
• forming a first discharge device within the substrate, the first discharge device comprising a first transistor having a first source/drain region, a second source/drain region, and a first gate region, wherein the first source/drain region is coupled to the well region, wherein the second source/drain region is coupled to a low voltage node;
• forming a first portion of a first antenna over or next to the first gate region, the first gate region being coupled to the first portion of the first antenna;
• and
• forming a first metallization layer over the well region using a first plasma process, wherein the first discharge device is configured to conduct during the first plasma process.