Single metal gate CMOS integration by intermixing polarity specific capping layers

A method for forming a complementary metal oxide semiconductor device, comprising:

• forming a first capping layer on a dielectric layer;
• blocking portions in the capping layer in regions where the capping layer is to be preserved using a block mask;
• bombarding exposed portions of the first capping layer with noble gas ions from a plasma discharge to drive elements of the first capping layer into the dielectric layer to form a first intermixed layer;
• removing the block mask;
• etching the first capping layer such that the first capping layer is removed to re-expose the dielectric layer in regions without removing the first intermixed layer;
• forming a second capping layer on the re-exposed dielectric layer and the first intermixed layer;
• blocking portions in the second capping layer in regions where the second capping layer is to be preserved using a second block mask;
• bombarding exposed portions of the second capping layer with noble gas ions from a plasma discharge to drive elements of the second capping layer into the dielectric layer to form a second intermixed layer;
• removing the second block mask;
• etching the second capping layer and the second intermixed layer such that the second capping layer is removed to re-expose the first intermixed layer in regions without removing the second intermixed layer;
• and
• forming transistors using the first intermixed layer for a first transistor type and using the second intermixed layer for a second transistor type.