Semiconductor memory device and method of manufacturing the same

A method of manufacturing a semiconductor memory device, the method comprising:

• providing a semiconductor substrate having junction regions, each junction region being formed between gate patterns;
• forming first and second insulating layers over the semiconductor substrate;
• forming first damascene patterns in the first and second insulating layers, wherein each first damascene pattern comprises first and second pad holes and contact holes in communication with the first and second pad holes, the first and second pad holes exposing the first insulating layer and extending in different directions, the contact holes penetrating the first insulating layer to expose the junction regions;
• forming a contact plug in each contact hole;
• forming a first conductive pad in each first pad hole;
• forming a second conductive pad in each second pad hole;
• forming a third insulating layer including a second dual damascene pattern that exposes an extended portion of each first conductive pad and pad contact holes that expose an extended portion of each second conductive pad;
• forming a first pad contact plug and a first bit line in the second dual damascene pattern;
• forming a second pad contact plug in each pad contact hole;
• forming a fourth insulating layer including trenches that expose the second pad contact plugs;
• and
• forming a second bit line in each trench.