Method of forming isolation layer of semiconductor memory device

A method of forming isolation layers of a semiconductor memory device, the method comprising:

• forming a tunnel dielectric layer and a conductive layer for a floating gate on a semiconductor substrate;
• forming trenches in the semiconductor substrate by removing portions of the conductive layer, the tunnel dielectric layer and the semiconductor substrate;
• gap-filling bottoms of the trenches with a first dielectric layer comprising a Spin On Dielectric (SOD) material;
• forming a second dielectric layer along a resulting surface after forming the first dielectric layer;
• performing a dry etch process to widen a width between the second dielectric layer formed on sidewalls of the conductive layer in the trenches, wherein the dry etch process is performed using a mixed gas of NH3 and HF;
• performing an annealing process to remove fluorine-containing impurities caused by the dry etch process;
• performing an etch process to remove remained fluorine-containing impurities after the dry etch process and the annealing process, wherein the wet etch process is performed using an etchant comprising HF;
• and
• forming a third dielectric layer over the second dielectric layer to gap-fill the trenches.