Semiconductor device manufacturing method and wafer
AssigneeFujitsu Semiconductor Limited
InventorToshihiro Wakabayashi
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AssigneeFujitsu Semiconductor Limited
InventorToshihiro Wakabayashi
Estimating the term…
A semiconductor device manufacturing method allowing effective inspection at low cost of a wafer having formed thereon chips. When forming chips on the wafer, a reticle having formed thereon chip patterns, monitor element/circuit patterns and connection patterns is used according to a formation step of the chips. The reticle is constructed such that a part of the monitor element/circuit patterns and the connection patterns are formed in the inner side area of an outer peripheral dicing area and when exposing adjacent shot positions, the pattern is formed on a portion where no outer peripheral dicing areas overlap whereas no pattern is formed on a part of a portion where outer peripheral dicing areas overlap. When using the reticle, a circuit which surrounds the whole chip formation area can be formed with the chips. According to this circuit, extensive electric characteristics on the wafer can be simply measured in a short time, so that quality determination of the wafer can be effectively performed at low cost.
A semiconductor device manufacturing method, comprising:
Dependencies are inferred from the claim text.