Capacitor pairs with improved mismatch performance
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChia-Yi Chen, Chung-Long Chang, Chih-Ping Chao
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Abstract
A semiconductor device includes a first capacitor comprising a plurality of first unit capacitors interconnected to each other, each having a first unit capacitance; and a second capacitor comprising a plurality of second unit capacitors interconnected to each other, each having a second unit capacitance, wherein the first unit capacitors and the second unit capacitors have equal numbers of unit capacitors. The first unit capacitors and the second unit capacitors are arranged in an array with rows and columns and placed in an alternating pattern in each row and each column. The first and the second unit capacitors each have a total number greater than two.
Claims10
A semiconductor device comprising:
- a first capacitor comprising a plurality of first unit capacitors interconnected to each other, each having a first unit capacitance;
- a second capacitor comprising a plurality of second unit capacitors interconnected to each other, each having a second unit capacitance, wherein the plurality of first unit capacitors and the plurality of second unit capacitors have equal numbers of unit capacitors, and are arranged in an array with rows and columns placed in an alternating pattern in each row and each column of the array, and wherein a total number of the first unit capacitors is greater than two, and a total number of the second unit capacitors is greater than two;
- and
- a common node connected to the first unit capacitors and the second unit capacitors.
A semiconductor device comprising:
- a first capacitor comprising a first plurality of unit capacitors interconnected to each other, each having a first unit capacitance of less than about 200fF or a first unit area of less than about 200 um2;
- a second capacitor comprising a second plurality of unit capacitors interconnected to each other, each having a second unit capacitance of less than about 200fF or a second unit area of less than about 200 um2, wherein the first and the second pluralities of unit capacitors have a same number of unit capacitors, and wherein the first and the second pluralities of unit capacitors are arranged as an array and are placed in an alternating pattern in each row and each column of the array;
- and
- a common node interconnecting the first plurality of unit capacitors to the second plurality of unit capacitors.
Dependencies are inferred from the claim text.