Method of making p-channel and n-channel MIS transistors using single film formation of TaC

A semiconductor device comprising:

• a substrate;
• and
• a p-channel MIS transistor formed on an n-type semiconductor area, the p-channel MIS transistor having a gate dielectric film formed on the n-type semiconductor area, and a gate electrode formed on the gate dielectric film, the gate electrode including a lower layer gate electrode formed of a Ta—C alloy in which a crystal orientation ratio of a TaC (111) face in a film thickness direction of the lower layer gate electrode [TaC (111) face/{TaC (111) face+TaC (200) face}] is 80% or more, a middle layer gate electrode formed on the lower layer gate electrode and formed of a Ta—C alloy in which the composition ratio (C/Ta) is 1.5 or more, and a upper layer gate electrode formed on the middle layer gate electrode and formed of p+-type silicon or p+-type silicon germanium.

A semiconductor device comprising:

• a substrate;
• and
• a p-channel MIS transistor formed on a n-type semiconductor area on the substrate, including a gate dielectric film formed on the n-type semiconductor area, a lower layer gate electrode formed on the gate dielectric film and formed of a Ta—C alloy in which a crystal orientation ratio of a TaC (111) face in a film thickness direction of the lower layer gate electrode [TaC (111) face/{TaC (111) face+TaC (200) face}] is 80% or more, an upper layer gate electrode formed on the lower layer gate electrode and made of a metal silicide, and an element precipitated layer formed in an interface area between the lower layer gate electrode and the gate dielectric film, the element being selected from the group consisting of boron and aluminum.