Method for performing place-and-route of contacts and vias in technologies with forbidden pitch requirements

A method of making a mask layout, the method comprising:

• positioning a plurality of features on a layout, wherein the plurality of features comprises
• a first feature, wherein the first feature is positioned along a first axis and a second axis orthogonal to the first axis, and
• a plurality of additional features, wherein each of the additional features is positioned on an axis parallel to the first axis and on an axis parallel to the second axis;
• determining a first set of areas adjacent to the first feature, wherein each of the areas in the first set of areas is defined by a distance (d1) to a distance (d2) away from the first feature and within a first angle away from one of the first axis and the second axis, and wherein each one of the areas in the first set of areas comprises one of the plurality of additional features;
• and
• patterning one of a contact hole feature and a sub-resolution assist feature (SRAF) in the position of the first feature and the additional features.

A non-transitory computer readable storage medium containing executable program code stored thereon, wherein the program code instructs a processor to perform a method of making a mask layout for forming contact holes on a semiconductor device including the following steps:

• patterning a first feature along a first axis;
• determining a first set of areas adjacent to the first feature, wherein each of the areas in the first set of areas is within a first angle away from the first axis, and wherein each of the areas in the first set of areas is within a first distance away from the first feature;
• and
• patterning a second feature in at least one of the first set of areas so as to form a mask layout, wherein each of the first feature and the second feature are one of a virtual feature and a real feature.

A mask for use in the manufacture of an integrated circuit, the mask comprising:

• a transparent substrate having a mask design, the mask design comprising,
• a first feature to be imaged on a substrate, wherein the first feature is positioned along a first axis and a second axis;
• and
• a second feature, wherein the second feature is positioned from about 100 nm to about 200 nm away from the first feature, and wherein the second feature is positioned from about ±15 degrees from one of the first axis and the second axis, and wherein the second feature is one of a sub-resolution assist feature and a feature to be imaged on the substrate.