Compact virtual ground diffusion programmable ROM array architecture, system and method
AssigneeVirage Logic Corporation
InventorsAmit Khanuja, Deepak Sabharwal
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AssigneeVirage Logic Corporation
InventorsAmit Khanuja, Deepak Sabharwal
Estimating the term…
A compact, shared source line and bit line architecture for a diffusion programmable ROM. In one embodiment, a ROM circuit or instance includes a plurality of storage cells organized as an array of rows columns. A shared source line is associated with a first pair of adjacent columns, the shared source line being maintained at a predetermined level, wherein source terminals of storage cells in the adjacent columns are electrically coupled to the shared source line. A shared bit line is associated with a second pair of adjacent columns, the shared bit line being maintained at the predetermined level, wherein drain terminals of storage cells in the adjacent columns are electrically coupled to the shared bit line.
A method of programming a Read-Only Memory (ROM) circuit having a plurality of storage cells organized as an array of rows and columns, said method comprising:
A system for programming a Read-Only Memory (ROM) circuit having a plurality of storage cells organized as an array of rows and columns, said system comprising:
Dependencies are inferred from the claim text.