US 7,608,896 B2 · Semiconductor device

Abstract

A semiconductor device has an n-channel MIS transistor and a p-channel MIS transistor on a substrate. The n-channel MIS transistor includes a p-type semiconductor region formed on the substrate, a lower layer gate electrode which is formed via a gate insulating film above the p-type semiconductor region and which is one monolayer or more and 3 nm or less in thickness, and an upper layer gate electrode which is formed on the lower layer gate electrode, whose average electronegativity is 0.1 or more smaller than the average electronegativity of the lower layer gate electrode. The p-channel MIS transistor includes an n-type semiconductor region formed on the substrate and a gate electrode which is formed via a gate insulating film above the n-type semiconductor region and is made of the same metal material as that of the upper layer gate electrode.

Claims18

Dependent claims

A semiconductor device with MIS transistors, comprising:

an n-channel MIS transistor which is fabricated on a substrate and which includes a p-type semiconductor region formed on the substrate, a first gate insulating film formed on the p-type semiconductor region, a first lower layer gate electrode which is formed on the first gate insulating film and whose film thickness is one monolayer or more and 3 nm or less, and a first upper layer gate electrode which is formed on the first lower layer gate electrode, which is made of metal material, and whose average electronegativity is 0.1 or more smaller than the average electronegativity of the first lower layer gate electrode;
and
a p-channel MIS transistor which is fabricated on the substrate and which includes an n-type semiconductor region formed on the substrate, a second gate insulating film formed on the n-type semiconductor region, and a second gate electrode which is formed on the second gate insulating film and is made of the metal material.

A semiconductor device comprising:

a substrate;
an n-channel MIS transistor which includes a p-type semiconductor region formed on the substrate, a first gate insulating film formed on the p-type semiconductor region, a first lower layer gate electrode which is formed on the first gate insulating film and whose film thickness is one monolayer or more and 3 nm or less, and a first upper layer gate electrode which is formed on the first lower layer gate electrode, which is made of metal material, and whose average electronegativity is smaller than an average electronegativity of the first lower layer gate electrode;
and
a p-channel MIS transistor which includes an n-type semiconductor region formed on the substrate, a second gate insulating film formed on the n-type semiconductor region, a second lower layer gate electrode which is formed on the second gate insulating film and whose film thickness is one monolayer or more and 3 nm or less, and a second upper layer gate electrode which is formed on the second lower layer gate electrode, which is made of the metal material, and whose average electronegativity is greater than an average electronegativity of the second lower layer gate electrode,
wherein a sum of an absolute value Δχ(1) of an average electronegativity difference between the first lower layer gate electrode and the first upper layer gate electrode and an absolute value Δχ(2) of an average electronegativity difference between the second lower layer gate electrode and the second upper layer gate electrode is 0.1 or more.

2 more elements

Dependencies are inferred from the claim text.

Semiconductor device

Life of this patent

Semiconductor device

Life of this patent

Abstract

Claims18