Semiconductor device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsRyo Arasawa, Tomoyuki Iwabuchi
Life of this patent
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Abstract
An object of the invention is to manage variation of electrical characteristics of an element in a semiconductor device due to a vapor deposition process by measuring electrical characteristics of a TEG. A substrate 100 of an active matrix EL panel includes a vapor deposition region 101 having a film formed by a vapor deposition method. In the vapor deposition region 101, a pixel region 102 is provided. A TEG 109 is provided in the vapor deposition region 101 having a film formed in a vapor deposition step and outside of the pixel region 102. A measurement terminal portion 110 for measuring the TEG 109 is provided outside of a sealing region 103.
Claims16
A semiconductor device comprising:
- a substrate including a first region and a second region provided in the first region;
- a pixel provided in the second region, wherein the pixel contains a first pixel circuit including a first transistor, a second transistor, a gate signal line, a data signal line and a power source line, and a light emitting element electrically connected to the first pixel circuit;
- a test element group for testing the first transistor and the second transistor in the second region, wherein the test element group is provided in the first region outside of the second region;
- and
- at least one terminal provided outside of the first region,
- wherein the test element group includes a second pixel circuit,
- wherein, in the first pixel circuit, the first transistor includes a gate connected to the gate signal line, and a source and a drain of which one is electrically connected to the data signal line and the other is electrically connected to a gate of the second transistor, and the second transistor has a source and a drain of which one is electrically connected to the power source line and the other is electrically connected to the light emitting element,
- wherein at least one of first transistor and second transistor of the second pixel circuit is electrically connected to the terminal, and
- wherein a potential of a gate signal line of the second pixel circuit is fixed.
A semiconductor device comprising:
- a substrate including a first region and a second region provided in the first region;
- a pixel provided in the second region, wherein the pixel contains a first pixel circuit including a first transistor, a second transistor, a gate signal line, a data signal line and a power source line, and a light emitting element electrically connected to the first pixel circuit;
- and
- a test element group for testing the first transistor and the second transistor in the second region, wherein the test element group is provided in the first region outside of the second region,
- wherein the test element group includes a second pixel circuit,
- wherein, in the first pixel circuit, the first transistor includes a gate connected to the gate signal line, and a source and a drain of which one is electrically connected to the data signal line and the other is electrically connected to a gate of the second transistor, and the second transistor has a source and a drain of which one is electrically connected to the power source line and the other is electrically connected to the light emitting element,
- wherein a potential of a gate signal line of the second pixel circuit is fixed.
A semiconductor device comprising:
- a substrate including a first region and a second region provided in the first region;
- a pixel provided in the second region, wherein the pixel contains a first pixel circuit including a first transistor, a second transistor, a gate signal line, a data signal line and a power source line, and a light emitting element electrically connected to the first pixel circuit;
- a test element group for testing the first transistor and the second transistor in the second region, wherein the test element group is provided in the first region outside of the second region;
- and
- at least one terminal provided outside of the first region,
- wherein the test element group includes a second pixel circuit,
- wherein, in the first pixel circuit, the first transistor includes a gate connected to the gate signal line, and a source and a drain of which one is electrically connected to the data signal line and the other is electrically connected to a gate of the second transistor, and the second transistor has a source and a drain of which one is electrically connected to the power source line and the other is electrically connected to the light emitting element,
- wherein at least one of first transistor and second transistor of the second pixel circuit is electrically connected to the terminal, and
- wherein a potential of a gate signal line of the second pixel circuit is fixed by using a buffer.
A semiconductor device comprising:
- a substrate including a first region and a second region provided in the first region;
- a pixel provided in the second region, wherein the pixel contains a first pixel circuit including a first transistor, a second transistor, a gate signal line, a data signal line and a power source line, and a light emitting element electrically connected to the first pixel circuit;
- and
- a test element group for testing the first transistor and the second transistor in the second region, wherein the test element group is provided in the first region outside of the second region,
- wherein the test element group includes a second pixel circuit,
- wherein, in the first pixel circuit, the first transistor includes a gate connected to the gate signal line, and a source and a drain of which one is electrically connected to the data signal line and the other is electrically connected to a gate of the second transistor, and the second transistor has a source and a drain of which one is electrically connected to the power source line and the other is electrically connected to the light emitting element,
- wherein a potential of a gate signal line of the second pixel circuit is fixed by using a buffer.
Dependencies are inferred from the claim text.