Dynamic random access memory cell and method for fabricating the same

A method for fabricating a dynamic random access memory cell, comprising:

• forming a trench in a substrate;
• forming a first capacitor dielectric layer on the surface of said trench;
• forming a conducting layer inside said trench;
• after forming the conducting layer, directly forming a second capacitor dielectric layer on the surface of said substrate and on said conducting layer, wherein said substrate around said first and second capacitor dielectric layers serves as a bottom electrode, and said second capacitor dielectric layer is a silicon oxide/silicon nitride/silicon oxide (ONO) stacked layer or a silicon nitride/silicon oxide (NO) stacked layer;
• forming a protruding electrode and a gate electrode on said substrate, said protruding electrode being on said substrate around said trench, covering a junction between said trench and said substrate, and exposing a portion of said conducting layer;
• forming a plurality of drain/source regions in said substrate beside two sides of said gate electrode;
• and
• electrically connecting said protruding electrode and said conducting layer, and said conducting layer and said protruding electrode being an upper electrode.

A method for fabricating a trench capacitor, comprising:

• forming a trench in a substrate;
• forming a first capacitor dielectric layer on a surface of said trench;
• forming a conducting layer inside said trench;
• after forming the conducting layer, directly forming a second capacitor dielectric layer on a surface of said substrate and on said conducting layer, wherein said substrate around said first and second capacitor dielectric layers serves as a bottom electrode, and said second capacitor dielectric layer is a silicon oxide/silicon nitride/silicon oxide (ONO) stacked layer or a silicon nitride/silicon oxide (NO) stacked layer;
• forming a protruding electrode on said substrate, said protruding electrode being on said substrate around said trench, and covering a junction between said trench and said substrate;
• and
• electrically connecting said protruding electrode and said conducting layer, said conducting layer and said protruding electrode being an upper electrode, wherein said upper electrode is isolated from said substrate.

A method for fabricating a dynamic random access memory cell, comprising:

• forming a trench in a substrate;
• forming a first capacitor dielectric layer on the surface of said trench;
• forming a conducting layer inside said trench;
• after forming the conducting layer, directly forming a second capacitor dielectric layer on the surface of said substrate and on said conducting layer, wherein said substrate around said first and second capacitor dielectric layers serves as a bottom electrode, and said second capacitor dielectric layer is a silicon oxide/silicon nitride/silicon oxide (ONO) stacked layer or a silicon nitride/silicon oxide (NO) stacked layer;
• forming a protruding electrode and a gate electrode on said substrate, said protruding electrode being on said substrate around said trench, and covering a junction between said trench and said substrate;
• forming a plurality of drain/source regions in said substrate beside two sides of said gate electrode;
• and
• electrically connecting said protruding electrode and said conducting layer, and said conducting layer and said protruding electrode being an upper electrode, wherein said upper electrode is isolated from said substrate.