Semiconductor device capable of avoiding latchup breakdown resulting from negative variation of floating offset voltage

A semiconductor device for driving a switching device having a first electrode, a second electrode, and a control electrode, said semiconductor device comprising:

• a first terminal connected to said first electrode;
• a second terminal connected to said first electrode through a capacitive element;
• a semiconductor substrate having a first conductivity type;
• a first impurity region formed in a main surface of said semiconductor substrate and having a second conductivity type;
• a second impurity region formed in a main surface of said first impurity region and having said first conductivity type;
• a first transistor having a source/drain region of said second conductivity type, said source/drain region of said first transistor being formed in a main surface of said second impurity region and connected to said first terminal;
• a second transistor having a source/drain region of said first conductivity type, said source/drain region of said second transistor being formed in the main surface of said first impurity region and connected to said second terminal;
• and
• at least one of a combination of a third impurity region formed in said main surface of said second impurity region, having said first conductivity type, and connected to said first terminal and a fourth impurity region formed in said main surface of said second impurity region and in contact with said third impurity region, having said second conductivity type, and connected to said first terminal, and a combination of a fifth impurity region formed in said main surface of said first impurity region, having said second conductivity type, and connected to said second terminal and a sixth impurity region formed in said main surface of said first impurity region and in contact with said fifth impurity region, having said first conductivity type, and connected to said second terminal.