Thin film transistor array panel and manufacturing method thereof
AssigneeSamsung Electronics Co., Ltd.
InventorsSahng-Ik Jun, Jae-Hong Jeon, Kwon-Young Choi, Jeong-Young Lee
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Abstract
A thin film transistor array panel is provided, which includes: a substrate; a first signal line formed on the substrate; a second signal line formed on the substrate and intersecting the first signal line; a thin film transistor including a gate electrode connected to the first signal line and having an edge substantially parallel to the first signal line, a source electrode connected to the second signal line, and a drain electrode overlapping the edge of the gate electrode; and a pixel electrode connected to the drain electrode.
Claims30
A thin film transistor array panel, comprising:
- a substrate;
- a first signal line formed on the substrate;
- a second signal line formed on the substrate and intersecting the first signal line;
- a thin film transistor, including a gate electrode connected to the first signal line and having an edge substantially parallel to the first signal line, a source electrode connected to the second signal line and having at least one arm extending in a direction substantially parallel to the second signal line, a drain electrode overlapping the edge of the gate electrode and a semiconductor having a protrusion overlapping the gate electrode, the source electrode and the drain electrode;
- and,
- a pixel electrode connected to the drain electrode,
- wherein the pixel electrode and the drain electrode are disposed in different layers on the substrate, and the semiconductor except for the protrusion have the same planar shape as the second signal line.
A thin film transistor array panel, comprising:
- a substrate;
- a first signal line formed on the substrate;
- a second signal line formed on the substrate and intersecting the first signal line;
- a thin film transistor, including a gate electrode connected to the first signal line and having an edge substantially parallel to the first signal line, a source electrode connected to the second signal line, a drain electrode comprising a first portion substantially parallel to the second signal line and overlapping the edge of the gate electrode, and a second portion extending from the first portion in a different direction than the first portion;
- and,
- a pixel electrode connected to the second portion of the drain electrode,
- wherein the pixel electrode and the drain electrode are disposed in different layers on the substrate.
A thin film transistor array panel, comprising:
- a substrate;
- a first signal line formed on the substrate;
- a second signal line formed on the substrate and intersecting the first signal line;
- a thin film transistor, including a gate electrode connected to the first signal lint and having an edge substantially parallel to the first signal line, a source electrode connected to the second signal line, a drain electrode comprising a first portion substantially parallel to the second signal line and overlapping the edge of the gate electrode;
- and,
- a pixel electrode connected to the drain electrode and comprising a first cutout extending in a first direction and a second cutout extending in a second direction,
- wherein the pixel electrode and the drain electrode are disposed in different layers on the substrate, and wherein the pixel electrode has a chamfered edge substantially perpendicular to the first direction or the second direction.
Dependencies are inferred from the claim text.